[coreboot] proposed patch, notsigned off, comments welcome.

ron minnich rminnich at gmail.com
Tue May 13 06:35:01 CEST 2008


latest


/tmp/lxirq
input enable 0f7af085 invert 0xcf7e3081
irqmap from vr is 0xd0c0700
4d1:4d0 0e00
GPIOmap (e0 to e8): 0/20000001 4/08051538 8/00000000 12/00000000
GPIO0: Interrupt:IG 1
GPIO7: Interrupt:IG 2
GPIO12: Interrupt:IG 3
GPIO13: Interrupt:IG 4
MSR 0x51400023: 0x9bab2

INTA, GPIO pin 0;Input Enabled and Inverted,Interrupt:GPIO BIT 1,IG 11,
INTB, GPIO pin 7;Input Enabled and Inverted,Interrupt:GPIO BIT 2,IG 10,
INTC, GPIO pin 12;Input Enabled and Inverted,Interrupt:GPIO BIT 3,IG 11,
INTD, GPIO pin 13;Input Enabled and Inverted,Interrupt:GPIO BIT 4,IG 9,

well, so far, it looks ok. The 4d1/4d0 value says 9,10,11 are level, right?

i.e. I'm more confused than ever :-)

One of two bits left to plumb, but no obvious error so far.

If it's ok, why won't it work?

ron
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