[coreboot] [PATCH] flashrom: ST M25P40 bug?

[Fredrik Tolf]

On Sun, 2008-05-11 at 15:32 +0200, Carl-Daniel Hailfinger wrote:
> Can you test the patch below? It should have a lower error probability
> and work fine for you. If you are OK with my changes to your patch,
> please re-add your Signed-off-by line.

Yes, the flashrom code with that patch seems to detect my chip and read
its contents quite well. However, the same code does not detect the
original chip on the board (an MX25L4005) satisfactory, and it seems to
be a conflict with the SPI code. Here's the output:

Calibrating delay loop... OK.
No coreboot table found.
Found chipset "NVIDIA MCP55", enabling flash write... OK.
Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial
flash segment 0xfffe0000-0xffffffff enabled
Serial flash segment 0x000e0000-0x000fffff enabled
Serial flash segment 0xffee0000-0xffefffff disabled
Serial flash segment 0xfff80000-0xfffeffff enabled
LPC write to serial flash enabled
serial flash pin 29
OK.
MX25L4005 found at physical address 0xfff80000.
unknown SPI chip found at physical address 0x0.
Multiple flash chips were detected: MX25L4005 unknown SPI chip
Please specify which chip to use with the -c <chipname> option.

Fredrik Tolf