[coreboot] AMDk8 - HT routing

Viswesh S viswesh_vichu at yahoo.com
Wed May 7 18:12:50 CEST 2008


But when you read the registers of Node7, as the device is not there, what value will it return, if we try to read any register, say 0x6c for getting the default link.

val = pci_read_config32(NODE_HT(7), 0x6c);   // What value does get return, as node7 is not there.
 byte = (val>>2) & 0x3; /*get default link on node7 to node0*/


----- Original Message ----
From: Marc Jones <marc.jones at amd.com>
To: Viswesh S <viswesh_vichu at yahoo.com>
Cc: coreboot at coreboot.org
Sent: Wednesday, 7 May, 2008 9:38:13 PM
Subject: Re: [coreboot] AMDk8 - HT routing

Viswesh S wrote:
> Hi,
> I am looking into the Linux bios code for AMD 64 boards.
> In the setup_coherent_ht_domain function, we have functions 
> setup_smp() and setup_smp2().
> In the setup_smp2(), say the link1 is coherent and connected, we write 
> the routing table for it, but then we veriify the connection for Node7 
> and then try to set the routing table registers for the link between 7 
> and 1.
> //*
> print_linkn("(0,1) link=", byte);
>  setup_row_direct(0,1, byte); //
>  setup_temp_row(0, 1);
>  verify_connection(7);
>  /* We found 2 nodes so far */
>  val = pci_read_config32(NODE_HT(7), 0x6c);
>  byte = (val>>2) & 0x3; /*get default link on node7 to node0*/
>  print_linkn("(1,0) link=", byte);
>  setup_row_local(7,1);
>  setup_remote_row_direct(1, 0, byte);
> *//
> What is the logic reason behind checking the node7 here.
> In the case of my board, there is no Node7 itself and will the 
> pci_write(outb instruction) cause any unknown behaviour, as the node 
> is not present.
> Thanks,
> Viswesh
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Hi Viswesh,

All AP nodes are node7 until they have been found and initialized by the 
BSP. The BSP looks at each active link and then sets the nodeids.


Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com

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