[coreboot] patch: two bugs in the cs5536 ide code

Peter Stuge peter at stuge.se
Wed May 7 14:11:13 CEST 2008

On Tue, May 06, 2008 at 08:37:34AM -0700, ron minnich wrote:
> the cs5536 is one chip. On v2, we treated it as more than one. For
> my goal of easing non-experts into the code, I decided to try
> making it one chip and one dts.

> I still think one dts per chip is the right way to go, but do we
> need more than one level of dts?

One level as in a single file - yes I think so.

One level as in one level of {} within that file - no I don't think

Whatever we do in dtc that depends on the file name right now should
instead depend on something else. Maybe device path+id? Or we create
a new namespace for chip "friendlynames" that are used to build code?

Case in point, looking at alix1c/dts:

        mainboard-vendor = "PC Engines";
        mainboard-name = "ALIX1.C";
        cpus { };
        apic at 0 {
        domain at 0 {

I'd like everything up to this point to be "inherited" from one
geodelx dts.

                /* Video RAM has to be in 2MB chunks. */
                geode_video_mb = "8";
                pci at 1,0 {

Oh, and the above 1,0 device as well.

                pci at 15,0 {
                        enable_ide = "1";

This would stay pretty much as is, except maybe the enable_ide should
be a generic enable variable instead, and be in pci at 15,4 or whatever.

Is 15 really determined by the mainboard by the way - it should _not_
be in the mainboard dts otherwise.

All the above may be a little premature. I was hoping we would have
"feedback" on the dts scheme from a larger K8 system available before
we made any more changes, but it seems the time is now.

Maybe I should just not be afraid to change it back and forth a few


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