[coreboot] [PATCH] Halt TCO timer on Intel 3100 chipset

Ed Swierk eswierk at arastra.com
Sat Mar 29 23:03:44 CET 2008

On Sat, Mar 29, 2008 at 6:38 AM,  <joe at smittys.pointclark.net> wrote:
>  This also happens with the i830. Luckly it is just one simple register
>  setting to disable it early in the process (auto.c).
>  /**
>   * We have to disable the TCO Timer system reboot feature
>   * or we get several reboots through out the boot processes.
>   */
>  static void disable_tco_timer(void)
>  {
>         device_t dev;
>         u8 reg8;
>         /* Set the LPC device statically. */
>         dev = PCI_DEV(0x0, 0x1f, 0x0);
>         /* Disable the TCO Timer system reboot feature. */
>         reg8 = pci_read_config8(dev, 0xd4);
>         reg8 |= (1 << 1);
>         pci_write_config8(dev, 0xd4, reg8);
>  }
>  My only question is your code seems a little more complicated? Does it
>  need to be that complicated? Otherwise it looks good.
>  Acked-by: Joseph Smith <joe at smittys.pointclark.net>

The code you quoted above does not disable the TCO timer but rather
prevents rebooting after the second timeout by setting the NO_REBOOT
flag. My patch instead halts the TCO timer altogether, preventing both
the SMI after the first timeout and rebooting after the second
timeout, by setting the TCO_TMR_HALT flag in the TCO Control 1

The NO_REBOOT flag also exists on the Intel 3100 but in a different
place, at bit 5 of the GCS register at offset 0x3410 from memory BAR
RCBA on the LPC bridge. Either approach would work, and either one
requires mapping a memory or IO space to expose the register, so
there's no difference in complexity.

Incidentally the TCO_TMR_HALT flag exists in the same place on a bunch
of Intel chipsets, including ICH3, ICH7 and 3100. So while my code is
a tad more complex, it's also more portable.


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