[coreboot] MIPS Yamon replacement?

Robin Randhawa robin.randhawa at gmail.com
Fri Mar 28 13:09:07 CET 2008


On Fri, 2008-03-28 at 12:49 +0100, Carl-Daniel Hailfinger wrote:

> High-speed switches/routers from Extreme Networks run with a MIPS64 CPU.
> It fits the definition of embedded, but I wouldn't claim they care much
> about power consumption.

I agree.

> 
> >> How would you go
> >> about flashing such a board?
> >>     
> >
> > To quote an example of the "prescribed" method : For a while, I was
> > working with a MIPS Malta board which is a baseboard containing the
> > Intel PIIX based southbridge and the peripheral buses including the
> > Flash at the reset vector. A number of "core cards" can be dropped onto
> > the Malta which contain a supported MIPS core and a system controller
> > (usually a Galileo GT64120 or one of several MIPS' in house controllers
> > such as the Bonito etc).
> >   
> 
> Was the flash attached to the PIIX?

Not in this case. There's a MIPS peripheral bus called the CBUS which
allowed access to the Flash and is mastered by the system controller. So
you first initialise the Processor<->Syscon Interface, then setup the
CBUS and you then have access to the Flash directly (Its CFI compliant
NOR Flash).

> > Anyways, they stuck in some code in a CPLD on the baseboard which ran
> > only if a physical switch was flipped and which would emulate a USB
> > printer over the bus. You could then write an SREC firmware image to
> > this printer from the host and the CPLD code would do the Flash
> > unlock-erase-program bits.
> >   
> 
> OK, so the CPLD acted as the programmer.

Exactly.

> > Fortunately (or otherewise) I do not have a Malta which is an expensive
> > beast. On the other hand, the board I do have is an Algorithmics P4032
> > which has the ability to conditionally (the condition being a jumper
> > setting) boot off an external Flash chip for which there is a DIP socket
> > provided which makes my task very easy. I just have to put in some
> > working firmware such as pmon (which supports this board) onto the
> > external Flash and then I can use it to program the board's internal
> > boot flash mapped at 0x1FC00000 as much as I like (get images off of
> >   
> 
> Sorry, I don't follow. How do you use the external flash to program the
> internal flash?

I first boot off the external flash which will contain the legacy pmon
firmware (I still need to figure out how to program it there). I then
have access to the internal boot flash which I can erase/write using the
pmon CLI. A bit round-about, I know. There probably is a JTAG route to
it as well but I do not have that luxury.

> > I'm not aware of flashrom just yet but most MIPS boards do have a JTAG
> > interface which needs to be used with an emulator and (usually
> > proprietary) software.
> >   
> 
> Short version: On most x86 machines, you can program EEPROM boot flash
> chips in-circuit.
> Most of these chips are attached to a LPC bus and after issuing a series
> of writes over LPC to predefined addresses of the flash chip, the flash
> chip enables erasing/writing to the chip. Chip identification is done
> the same way.
> The coreboot flashrom utility performs all these actions and eliminates
> the need for a special hardware programmer.

I see. Well, embedded MIPS boards all have one thing in common - the
location of the Boot Flash (0x1FC00000 onwards). How one is to reach it
will vary from system to system so flashrom may not be the way to go I
would think.

Cheers,
Robin





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