[coreboot] MIPS Yamon replacement?

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Fri Mar 28 12:49:38 CET 2008


On 28.03.2008 09:34, Robin Randhawa wrote:
> On Fri, 2008-03-28 at 00:55 +0100, Uwe Hermann wrote:
>   
>> On Thu, Mar 27, 2008 at 03:14:36PM +0100, Carl-Daniel Hailfinger wrote: 
>>     
>>
>> Also, are there generic "PC"-like machines with a standard "ROM chip" as
>> in x86-world, or are they exclusively embedded boards?
>>     
>
> While I have never played with them, there are a host of such machines
> based on MIPS processors made by SGI and Sun which I assume would have
> such standard "ROM chips". 
>
> The prevalent market as of now is of course the embedded space where
> MIPS processors have proliferated into networking gear, set top boxes,
> game consoles etc. The thumb rule is that MIPS tries to position itself
> wherever ARM does, but with a lot less luck. :)
>   

High-speed switches/routers from Extreme Networks run with a MIPS64 CPU.
It fits the definition of embedded, but I wouldn't claim they care much
about power consumption.


>> How would you go
>> about flashing such a board?
>>     
>
> To quote an example of the "prescribed" method : For a while, I was
> working with a MIPS Malta board which is a baseboard containing the
> Intel PIIX based southbridge and the peripheral buses including the
> Flash at the reset vector. A number of "core cards" can be dropped onto
> the Malta which contain a supported MIPS core and a system controller
> (usually a Galileo GT64120 or one of several MIPS' in house controllers
> such as the Bonito etc).
>   

Was the flash attached to the PIIX?


> Anyways, they stuck in some code in a CPLD on the baseboard which ran
> only if a physical switch was flipped and which would emulate a USB
> printer over the bus. You could then write an SREC firmware image to
> this printer from the host and the CPLD code would do the Flash
> unlock-erase-program bits.
>   

OK, so the CPLD acted as the programmer.


> Fortunately (or otherewise) I do not have a Malta which is an expensive
> beast. On the other hand, the board I do have is an Algorithmics P4032
> which has the ability to conditionally (the condition being a jumper
> setting) boot off an external Flash chip for which there is a DIP socket
> provided which makes my task very easy. I just have to put in some
> working firmware such as pmon (which supports this board) onto the
> external Flash and then I can use it to program the board's internal
> boot flash mapped at 0x1FC00000 as much as I like (get images off of
>   

Sorry, I don't follow. How do you use the external flash to program the
internal flash?


> ethernet/RS-232 etc). This is what I aim to do basically, once I can get
> someone with a Flash programmer to sort things out for me initially.
>
> Another idea I am playing with is to use GXEmul
> [http://gavare.se/gxemul/] which is a system emulator (not just the
> core). It currently supports the P5042 which is a souped up P4032. If I
> could get GXEmul to support my board, I have an excellent test bed ready
> to use. More on my experiments with this later.
>
>   
>>  Can flashrom be hacked to support them or
>> do you usually use some sort of JTAG interface?
>>     
>
> I'm not aware of flashrom just yet but most MIPS boards do have a JTAG
> interface which needs to be used with an emulator and (usually
> proprietary) software.
>   

Short version: On most x86 machines, you can program EEPROM boot flash
chips in-circuit.
Most of these chips are attached to a LPC bus and after issuing a series
of writes over LPC to predefined addresses of the flash chip, the flash
chip enables erasing/writing to the chip. Chip identification is done
the same way.
The coreboot flashrom utility performs all these actions and eliminates
the need for a special hardware programmer.

Regards,
Carl-Daniel




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