[coreboot] .. Re: .. Re: Via epia

[jtd]

On Sunday 16 March 2008 05:21 am, Jacek Chruscik wrote:
> I never managed to build working normal image for epia-m though.
> Fallback works fine, and vga bios too.
> The only odd behaviour is that my epia-m2 has about 12sec delay
> before it runs the coreboot image.
>
> here's my config.lb:
> (57344 is my vga bios rom size)
>
> ------------------------------------------------------
>
> target via_epia-m
> mainboard via/epia-m
> option MAXIMUM_CONSOLE_LOGLEVEL=8
> option DEFAULT_CONSOLE_LOGLEVEL=8
> option CONFIG_CONSOLE_SERIAL8250=1
> option CONFIG_CONSOLE_VGA=1
> option ROM_SIZE=0x40000-57344
> option HAVE_OPTION_TABLE=1
> option CONFIG_ROM_PAYLOAD=1
> option HAVE_FALLBACK_BOOT=1
> option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
> option _RAMBASE=0x00004000
> option FALLBACK_SIZE=0x40000-57344
>
> romimage "fallback"
> 	option USE_FALLBACK_IMAGE=1
> 	option ROM_IMAGE_SIZE=0x10000
> 	payload /boot/filo/filo.elf
> end
>
>
> buildrom ./coreboot.rom ROM_SIZE "fallback"
> ----------------------------------------------------------

"XIP_ROM_BASE is not a multiple of XIP_ROM_SIZE"
make[1]: *** [auto.inc] Error 1

??
-- 
Rgds
JTD