[coreboot] [PATCH] flashrom: Prepare for ICH7/ICH8 SPI support

[Carl-Daniel Hailfinger]

On 14.03.2008 17:50, Uwe Hermann wrote:
> On Fri, Mar 14, 2008 at 04:12:58PM +0100, Carl-Daniel Hailfinger wrote:
>   
>>  /*
>> - * See ie. page 375 of "Intel ICH7 External Design Specification"
>> - * http://download.intel.com/design/chipsets/datashts/30701302.pdf
>> + * See ie. page 375 of "Intel I/O Controller Hub 7 (ICH7) Family Datasheet"
>> + * http://download.intel.com/design/chipsets/datashts/30701303.pdf
>>   */
>>  static int enable_flash_ich(struct pci_dev *dev, const char *name,
>>  			    int bios_cntl)
>> @@ -153,6 +154,10 @@
>>  	 */
>>  	old = pci_read_byte(dev, bios_cntl);
>>  
>> +	printf("BIOS Lock Enable: %sabled, ", (old & (1 << 1)) ? "en" : "dis");
>>     
>
>
>   
>> +	printf("BIOS Write Enable: %sabled, ", (old & (1 << 1)) ? "en" : "dis");
>>     
>
> Shouldn't this be 'old & (1 << 0)'? Write enable is bit 0, lock enable
> is bit 1.
>   

Thanks, fixed. The checkin will also have all new printk as printk_debug
(that was in my version anyway, I just forgot to send it to the list).

Regards,
Carl-Daniel

-- 
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