[coreboot] flashrom and PM49FL004/2

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Thu Mar 13 13:38:32 CET 2008

On 11.03.2008 11:12, Nikolay Petukhov wrote:
> Hi, all.
> I have PCISA-LX-800 board (AMD LX800 + CS5536)
> http://www.ieiworld.com/en/product_IPC.asp?model=PCISA-LX.
> The flashrom detect flash device on this board,
> hier flashrom output:
> ...
>   Pm49FL004 found at physical address 0xfff80000.
>   Flash part is Pm49FL004 (512 KB).
> ...
> But the flashrom has problems with write and erasing operations to
> this flash device.
> The data-sheet on PM49FL004/2 say that:
> This flash device can work in two modes: LPC and FWH.
> On this board flash device be in FWH mode
> (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d)
> Also data-sheet on PM49FL004/2 say that:
> In FWH mode are available Block Locking Registers and in default flash
> is locked for write/erasing.
> This patch add unlocking operation PM49FL004/2 before write/erasing operation.
> Signed-off-by: Nikolay Petukhov <nikolay.petukhov at gmail.com>

I'm reluctant to apply this because it may cause problems if the flash
is in LPC mode. The data sheet seems to suggest the Block Locking
Registers are not available in LPC mode and we don't know how the chip
will react if it is in LPC mode.

I like the rest of the patch, though, and will Ack it once we know more
about block locking on these chips for LPC.



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