[coreboot] [PATCH] extend the VT8237R ROM decode

[Uwe Hermann]

On Wed, Mar 12, 2008 at 11:43:09PM +0100, Rudolf Marek wrote:
> Following patch extends the ROM decoding to last 1MB, allowing to use larger
> flashes such as SST49LF080A: 1024K x8 (8 Mbit)
> 
> Tested on my system, the flash is found and if I use coreboot in second half it
> works too.
> 
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Acked-by: Uwe Hermann <uwe at hermann-uwe.de>

Tested on ASUS A8V-E Deluxe with a 1MB coreboot image (modified ROM_SIZE
in targets/.../Config.lb) using a SST49LF080A chip. Boots fine.


> Index: src/southbridge/via/vt8237r/vt8237r_early_smbus.c
> ===================================================================
> --- src/southbridge/via/vt8237r/vt8237r_early_smbus.c	(revision 3134)
> +++ src/southbridge/via/vt8237r/vt8237r_early_smbus.c	(working copy)
> @@ -212,3 +212,18 @@
>  	else
>  		PRINT_DEBUG("Done\r\n");
>  }
> +
> +void enable_rom_decode(void)
> +{
> +	device_t dev;
> +
> +	/* Power management controller */

You mean "LPC" or maybe "Bus Control and Power Management" as per
datasheet?


> +	dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
> +				       PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
> +
> +	if (dev == PCI_DEV_INVALID)
> +		die("SB not found\r\n");
> +
> +	/* ROM decode last 1MB FFC00000 - FFFFFFFF*/

Missing full stop and space before "*/".


Uwe.
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