[coreboot] Two questions about 690/600
peter at stuge.se
Mon Mar 3 12:55:12 CET 2008
On Mon, Mar 03, 2008 at 06:04:01PM +0800, Feng, Libo wrote:
> We are adapting LB for AMD Herring board based on Turion 64x2 and
Good news! :)
> 1. How to enable the VGA controller on 690? LB has detected the
> controller, from the previous experience, we seem to need a VBIOS
> to initialize the controller. But the controller is integrated into
> the 690, can we handle it just like an onboard controller and put
> VBIOS at 0xfff80000 and run VBIOS in the function of dev_initialize?
Yes, including a copy of the VGA BIOS into coreboot is one way to
make it work. Note that for this to be really useful AMD would need
to allow distribution of the VGA BIOS for the 690 - which may or may
not be possible. (Not possible for Geode for example.)
Another way is to write native graphics drivers for coreboot, Linux
framebuffer and X.org. This is how the Geode works, except there is
no coreboot driver so the graphics controller is not initialized at
boot until the Linux kernel framebuffer driver has started.
Personally I prefer this over including a VGA BIOS, but unless
someone also writes a coreboot graphics driver there will be the
drawback of having no graphics at all during the potentially
sensitive step of starting the payload. (If the payload doesn't
work as intendend, many users will require graphics to proceed.)
> 2. 600 is attached to 690 via A-Link, from my understanding, 600
> should be on another PCI bus, but from the LB trace, it seems 600
> is still on PCI bus 0. Why? The 690 Datasheet says NB/SB Link P2P
> bridge is hidden by default, is this the reason?
I don't know anything about the 690/600 interconnect so I can only
guess here - but you are correct that devices behind a hidden bridge
will appear on the same bus as the bridge.
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