[coreboot] flashrom: Cache probed id:s

Peter Stuge peter at stuge.se
Tue Jun 24 11:36:50 CEST 2008

On Tue, Jun 24, 2008 at 11:16:37AM +0200, Carl-Daniel Hailfinger wrote:
> >> NACK. This patch randomly (depending on flashchips.c order) breaks
> >> probing for ~80% of the chips we currently support.
> >
> > Can you expand on why this would happen?
> The pointer to the (bios) probe location changes depending on flash
> chip size.

Yes of course! Thank you to Stefan and you for cluestick on head.

> There are three ways to solve this:
> - Keep probe results per function per chip size (ugly)

I like a variation on this:

- Cache probe results per function per start address

I don't think it's so ugly because as you pointed out the address
probed is input to the sequence.

Needs a little more code changed though.

> - Create different probe_jedec_* functions per chip size
> (probe_jedec_512k, probe_jedec_1024k...) (embarrassing)

Haha, yes. :)

> - Leave the code as-is (preferred).

Mh, not so nice. :\


More information about the coreboot mailing list