[coreboot] Newbee patch for A49LF040A (Alix2c2) please have a look.

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sat Jun 7 19:02:00 CEST 2008


On 07.06.2008 18:37, Stefan Reinauer wrote:
> Carl-Daniel Hailfinger wrote:
>   
>> On 07.06.2008 16:29, Peter Stuge wrote:
>>   
>>     
>>> On Sat, Jun 07, 2008 at 04:07:29PM +0200, Stefan Reinauer wrote:
>>>   
>>>     
>>>       
>>>> Ah, this is broken... flashrom should not continue when it found a
>>>> chip in a given memory area already.
>>>>
>>>>         

>> Well, you can have multiple different/identical LPC chips on the same
>> bus as long as they are strapped to different memory locations (chip
>> numbers). flashrom ignores that right now.
>>     

>>> flashrom supports boards with more than one flash chip.
>>>
>>> But perhaps we need to teach flashrom more about how chips can be
>>> connected. On boards with two chips, they can obviously not be on
>>> the same LPC bus for example. There would be a collision on the bus.  
>>> 3. Teach flashrom that the only way to have multiple flash chips is
>>>    to have them on different busses. LPC and ISA would have to be
>>>    considered the same, which I think is OK.
>>>
>>> This sucks for the same reasons as #2 above. The order of entries in
>>> flashchips.c becomes important here as well.
>>>
>>>
>>>       
>> That's the only correct way to do it.
>>
>>
>>     
> It does not have to be different busses. There can be 4 flash chips in a
> row on the same bus, but not sharing the same physical address space.
>   

Yes, I wrote that in my mail as well. The "only correct way" statement
was a bit strong, it was intended to request probing for one chip per
bus+addresspace only.

Regards,
Carl-Daniel
-- 

http://www.hailfinger.org/





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