[coreboot] Problem with PLL

[Peter Stuge]

On Wed, Jun 04, 2008 at 01:30:52PM +0200, Uwe Schwarz wrote:
> >If it fails in the reset you can try making the pll lock time
> >longer but I doubt that it will help.
> >msrGlcpSysRstpll.lo |= (0xFF << RSTPPL_LOWER_HOLD_COUNT_SHIFT);
> 
> and that did the trick.

What is this indicative of?

Some clock quality parameter?


//Peter