[coreboot] [patch][v2] AMD Fam10 rev B3 microcode patches

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Tue Jul 22 02:52:41 CEST 2008


On 22.07.2008 01:02, Marc Jones wrote:

> Update to the latest AMD Fam10 microcode patches.
>
> Signed-off-by: Marc Jones <marc.jones at amd.com>
>
> Index: coreboot-v2/src/cpu/amd/model_10xxx/mc_patch_01000083.h
> ===================================================================
> --- /dev/null	1970-01-01 00:00:00.000000000 +0000
> +++ coreboot-v2/src/cpu/amd/model_10xxx/mc_patch_01000083.h	2008-07-21 16:14:25.000000000 -0600
> @@ -0,0 +1,165 @@
> +/*
> + ============================================================
> + (c) Advanced Micro Devices, Inc., 2004-2008
> +
> + The  enclosed microcode  is intended  to be  used  with AMD
> + Microprocessors.  You  may   copy,  view  and  install  the
> + enclosed microcode  only for development  and deployment of
> + firmware,  BIOS,  or  operating  system code  for  computer
> + systems   that  contain  AMD   processors.   You   are  not
> + authorized  to use  the  enclosed microcode  for any  other
> + purpose.
>   

I trust that AMD is not going to hunt us down if we check out the
complete svn tree (copy) with the intent to develop for non-AMD systems.
Still, the legalese feels a bit weird.


> Index: coreboot-v2/src/cpu/amd/model_10xxx/update_microcode.c
> ===================================================================
> --- coreboot-v2.orig/src/cpu/amd/model_10xxx/update_microcode.c	2008-07-21 15:21:35.000000000 -0600
> +++ coreboot-v2/src/cpu/amd/model_10xxx/update_microcode.c	2008-07-21 16:46:37.000000000 -0600
> @@ -31,14 +31,29 @@
>  
>  #ifdef __ROMCC__
>  
> -	// Barcelona rev Ax
> +/* From the Revision Guide :
> + * Equivalent Processor Table for AMD Family 10h Processors
> + *
> + * Installed Processor   Equivalent Processor   Patch Level
> + * Revision ID           Revision ID
> + * 00100F00h             1000h                  01000020h
> + * 00100F01h             1000h                  01000020h
> + * 00100F02h             1000h                  01000020h
> + * 00100F20h             1020h                  01000084h
> + * 00100F21h             1020h                  01000084h
> + * 00100F2Ah             1020h                  01000084h
> + * 00100F22h             1022h                  01000083h
> + * 00100F23h             1022h                  01000083h
>   

AFAICS it could happen that different "Equivalent Processor IDs" have
the same patch level. Naming the microcode files only after the patch
level would cause all sorts of interesting conflicts in that case.
How about a naming scheme like
mc_patch_$EQUIVALENTREVISION_$PATCHLEVEL.h

> + */
> +
> +	/* Barcelona rev Ax */
>  //		#include "mc_patch_01000020.h"
>  
> -	// Barcelona rev B0, B1, BA
> -//		#include "mc_patch_01000066.h"
> +	/* Barcelona rev B0, B1, BA */
> +//		#include "mc_patch_01000084.h"
>  
> -	// Barcelona rev B2, B3
> -		#include "mc_patch_01000065.h"
> +	/* Barcelona rev B2, B3 */
> +		#include "mc_patch_01000083.h"
>   

This looks like manual source code editing is required to support
Barcelona processors before B2. May I suggest a Kconfig variable for that?

>  
>  #endif
>  	/*  Dummy terminator  */
>   
>   

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/





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