[coreboot] [LinuxBIOS] flashrom on ga 2761gxdk

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Thu Jan 24 18:57:12 CET 2008


On 23.01.2008 05:25, ron minnich wrote:
> OK, with 3073, something went worse.
>   

r3073 and r3072 did not have any changes affecting you.

> Last night, I was flashing just fine. As of today, it's not id'ing it
> and it is reading 0xff back for that pass.

Maybe the port it reads from gives 0xff for every read? Cause could be
- a LPC misconfiguration (port not passed through anymore)
- flaky wire.

>  I am attaching a failed
> (first) and successfull on the 4mbit part (second half) of the file.
>   

The log you posted does not seem to be the log you refer to. What I read
from the log is:
First run in verbose mode with SST25VF016B.
Second run (not verbose) with a duplicated line "serial flash pin 29",
SST25VF040B.
Cut-and-paste error? Can you post the logs again as separate files with
verbose execution?

Besides that, I am confused how many chips you already have tried. There
were some Macronix and some SST chips, right?

> I'm trying to get to the point of trying to figure out if this 2M part
> will ever work on this board. I am beginning to have my doubts.
>
> My only remaining differences are this:
>   

Yes, this is the patch I sent earlier.

> Index: spi.c
> ===================================================================
> --- spi.c       (revision 3073)
> +++ spi.c       (working copy)
> @@ -155,6 +155,12 @@
>                         0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
>                 printf("LPC write to serial flash %sabled\n",
>                         (tmp & 1 << 4) ? "en" : "dis");
> +               if (!(tmp & 1 << 4)) {
> +                       printf("Force enabling LPC write to serial flash\n");
> +                       tmp |= 1 << 4;
> +                       regwrite(port, 0x24, tmp);
> +               }
> +               printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
>                 printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
>                 /* LDN 0x7, reg 0x64/0x65 */
>                 regwrite(port, 0x07, 0x7);
> @@ -375,7 +381,8 @@
>         switch (flash->manufacture_id) {
>         case ST_ID:
>         case MX_ID:
> -               if ((flash->model_id & 0xff00) == 0x2000)
> +               if (((flash->model_id & 0xff00) == 0x2000) ||
> +                       ((flash->model_id & 0xff00) == 0x2500))
>                         spi_prettyprint_status_register_st_m25p(status);
>                 break;
>         case SST_ID:
>   


Regards,
Carl-Daniel




More information about the coreboot mailing list