[coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F).

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Tue Jan 22 01:09:09 CET 2008

Harald: This patch should fix your problems writing to the chip. Use
either "patch -l" or remove the // before
//while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)

Ronald: I need an ack to commit this.

On 20.01.2008 11:59, Ronald Hoogenboom wrote:
> Carl-Daniel Hailfinger wrote:
>> Did you have time to test with the while
>> (generic_spi_read_status_register() & .._WIP) enabled? It would be more
>> correct to have it enabled.
> I had that in initially (that's why it was there, but commented out) but 
> all it got me was slower programming times and the datasheet also 
> suggests it is ok to just do a timed wait. But in the face of 
> genericness for other chips, it is indeed more correct to do the check 
> for the busy bit.

Ronald/Harald, can you please ack the change? It is reproduced below


Make sure we delay writing the next byte long enough in SPI byte
Minor formatting changes.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: spi.c
--- spi.c	(Revision 3068)
+++ spi.c	(Arbeitskopie)
@@ -519,12 +519,8 @@
 	for (i=0; i<total_size; i++) {
-		/* FIXME: We really should read the status register and delay
-		 * accordingly.
-		 */
-		//while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+		while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
 		//if (i%1024==0) fputc('b',stderr);


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