[coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F).
Ronald Hoogenboom
hoogenboom30 at zonnet.nl
Sun Jan 20 11:59:22 CET 2008
Carl-Daniel Hailfinger wrote:
>Did you have time to test with the while
>(generic_spi_read_status_register() & .._WIP) enabled? It would be more
>correct to have it enabled.
>
>
>
I had that in initially (that's why it was there, but commented out) but
all it got me was slower programming times and the datasheet also
suggests it is ok to just do a timed wait. But in the face of
genericness for other chips, it is indeed more correct to do the check
for the busy bit.
The read status register will take at least:
16*(2/33) us = about 1 us (excluding the LPC latency, which is....?), so
assuming that the first read status will show busy and the second will
show ready, it is only 2 us slower: ~20%, so that should be acceptable.
I'll do some checks on the hardware shortly.
>Regards,
>Carl-Daniel
>
>
Regards back,
Ronald.
More information about the coreboot
mailing list