[coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F).

Ronald Hoogenboom ronald at zonnet.nl
Thu Jan 17 23:32:38 CET 2008

Now I'm looking at how to make the rom_stream read the flash chip like
in the over512k_read_chip.
But I'm a bit stuck on the overal mechanics of the initialization
process and how to get hold of the assigned io port for the SPI serial
flash controller in the IT8716.
This is supposed to be configured by the GPIO Config registers (LDN 07)
at index 0x64 and 0x65, but in the pnp_dev_info array in
it8716f/superio.c, there is nothing listed after IT8716F_GPIO, while at
other indexes, there is. Does this mean that the superio.c file fails to
configure this io port?

Suppose that this port IS configured correcly, what means should my
rom_stream use to retrieve this port address?

Is there some doc about these pnp functions?

Suppose I've figured it all out and created my new rom_stream_over512k
(or so) object, how do I mingle it into the Config.lb files, so it will
automatically get chosen when a ROM_SIZE of over 512k is selected in the
target configuration (AND the superio is an IT8716F).

In the targets/gigabyte/m57sli directory, there is a Config.lb.kernel
file, which I used as a base for my build, but it only uses a 'fallback'
and a 'failover' image. Why no 'normal' one? What is supposed to be the
purpose of each image? (You see, I'm really missing some key parts of
the big picture...)


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