[coreboot] [LinuxBIOS] m57sli : debugging the flashrom problem when booting with LB

[Stefan Reinauer]

ron minnich wrote:
> OK, this is an important point for v2. The right way to do this is to
> add these variables to the mcp55 chip.h:
> add the lines
> u32 a0, a4, a8, ac, b0, b4;
>
> Then, in the Config.lb for the mainboard, you do something like this
> in the section for the
> southbridge:
>
> register "a0" = "c1100001"
> register "a4" = "0"
> register "a8" = "0"
> register "ac" = "0"
> register "b0" = "02f40295"
> register "b4" = "085f0800"
>   

Is this something the user is supposed to understand? Are these 
properties of the device tree?

What do those values mean? GPIOs?

How will we do this in v3? 
Something like

gpio { num=32, direction=output, value=1 } # Disable write protection

-- 
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info at coresystems.de  • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866


-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 249 bytes
Desc: OpenPGP digital signature
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20080115/3442ffeb/attachment.sig>