[coreboot] [PATCH] v3: create dbe61 dts equivalent to v2 Config.lb

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Mon Feb 18 21:18:30 CET 2008

On 18.02.2008 18:53, Marc Jones wrote:
> ron minnich wrote:
>> On Feb 18, 2008 9:28 AM, Carl-Daniel Hailfinger wrote:
>>> The dbe61 initram code in v3 seems to be in a rather bad shape. Is there
>>> any reason we can't drop it and use the alix1c initram code as template?
>> That seems like a reasonable idea to me.
>> The alix1c code is pretty flexible.
> The dbe61 doesn't have a SPD for the memory, so I started to go the 
> table route but never got it working. I think we can figure it out from 
> a working ROM.  The other special thing they do is use the DDC pins on 
> the VGA connector for serial. Using the alix1c initram would be a good 
> place to start because it is so clean and simple.

I just used the alix1c initram code for the dbe61 and the patch below it 
at least compiled. That's quite a bit of progress.


Add northbridge/amd/geodelx/raminit.c to the Artecgroup DBE61 makefile.
Completely replace DBE61 initram code by Alix.1C initram code.

svn rm mainboard/artecgroup/dbe61/initram.c

svn cp mainboard/pcengines/alix1c/initram.c mainboard/artecgroup/dbe61/initram.c

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: LinuxBIOSv3-dbe61/mainboard/artecgroup/dbe61/Makefile
--- LinuxBIOSv3-dbe61/mainboard/artecgroup/dbe61/Makefile	(revision 609)
+++ LinuxBIOSv3-dbe61/mainboard/artecgroup/dbe61/Makefile	(working copy)
@@ -22,6 +22,7 @@
 STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o
 INITRAM_OBJ =   $(src)/mainboard/$(MAINBOARDDIR)/initram.c \
+		$(src)/northbridge/amd/geodelx/raminit.c \


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