[coreboot] alix1c current state
rminnich at gmail.com
Fri Feb 8 17:00:13 CET 2008
On Feb 8, 2008 7:53 AM, ron minnich <rminnich at gmail.com> wrote:
> On Feb 8, 2008 3:51 AM, Carl-Daniel Hailfinger
> <c-d.hailfinger.devel.2006 at gmx.net> wrote:
> > On 08.02.2008 06:54, ron minnich wrote:
> > > This patch (which is NOT signed off) adds (or tries to) PIRQ support
> > > for the alix1c.
> > >
> > > it crashes and burns badly, however, I don' t know why.
> > >
> > You found the problem with LAR parsing of ELF. Any reason why this can't
> > affect stage2 as well?
> I am pretty sure it is. I am thinking on stage 2, however, to add a
> manual step in main
> memset(bss, 0, end-bss);
ok, no need: the .bss thing is no longer an issue. Here is LAR:
normal/stage2/segment0 (191796 bytes, lzma compressed to 110 bytes
@0x9500);loadaddress 0x0xb8a0 entry 0x0x2000
normal/stage2/segment1 (32284 bytes, lzma compressed to 17073 bytes
@0x95c0);loadaddress 0x0x2000 entry 0x0x2000
normal/stage2/segment2 (6300 bytes, lzma compressed to 431 bytes
@0xd8d0);loadaddress 0x0xa000 entry 0x0x2000
Note that stage2 segment 0 is bss! The LAR fix is buying us quite a
lot. (that said, decompressing zeros may be a very expensive way to
zero-fill a region ...)
This leaves me more puzzled, will try more tonight.
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