[coreboot] Fwd: VIA EPIA CN100000 is finally Working all.

Corey Osgood corey.osgood at gmail.com
Mon Feb 4 18:37:32 CET 2008

Oops, forgot the cc. I need to get thunderbird set back up.


---------- Forwarded message ----------
From: Corey Osgood <corey.osgood at gmail.com>
Date: Feb 4, 2008 12:36 PM
Subject: Re: [coreboot] VIA EPIA CN100000 is finally Working all.
To: urbez at linuxupc.upc.edu

On Feb 4, 2008 8:08 AM, <urbez at linuxupc.upc.edu> wrote:

> Sorry :))) i have read this and yes, after the wrmsr, must have a }
> problem with cut and paste to the email , the 80 character console :)
> if (!(msr.lo & 0x10000)) {msr.lo|=0x10000
> ;wrmsr(MSR_IA32_MISC_ENABLE,msr);}
> And it works with C7 cpu, and uses the minimum voltage that accepts your
> and the maximum Speed Multiplier of your CPU.
> I'm not sure if works on another CPU.

Ok, thanks. I'm having some issues with that bit of code as well:

        msr = rdmsr(MSR_IA32_PERF_STATUS);
        //TODO: wait CPU not busy bit 16 & 17 off (STATUS)
        wrmsr(MSR_IA32_PERF_CTL, 0, ((hi & 0xff00) | ((hi >> 16) & 0xff00));

This fails to compile, because wrmsr needs only 2 params and an msr struct
(I think, never dove much into the msr stuff). I think this is what you're
intending, just need to know if it's right:

         msr.lo = 0;
         msr.hi &= 0xff00;
         msr.hi |= (msr.hi >> 16); //or should it be msr.lo?
        wrmsr(MSR_IA32_PERF_CTL, msr);

> Mmm, i must download the last svn, for compare with that i have, with a
> diff.
> Is different the auto.c, that i use, i cray for fit into the ROM_SIZE.
> Initially i have working with a separate v8237 driver copied from another
> via
> , but, finally, if i remember i use the entire v8237r version of Rudolf
> Marek.
> I confirm that, when i can generate the pach for epia-cn, i'm at work :)
> The CF8, is a missed parameter that i use in another program.
> I use normally another PCI routines, i not remember why. I cray, for pass
> the
> size as a parameter, better, if you use tables.
> Ignore the CF8, and cut it :)
> It is possible that your mainboard, starts with diferent parameters in the
> bridge that not afect mine?
> But wait for the DIFF results with the last version of SVN, to confirm if
> are
> more easy the problem, and i can have forgotten extra changes.

If you want just  send me a tarball of whatever you have, I'll sort through
it and whip up a patch. I'm stuck in st. elsewhere with no access to the
machine tonight anyways.

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20080204/44096d86/attachment.html>

More information about the coreboot mailing list