[coreboot] windows XP boots with ACPI HAL

Myles Watson mylesgw at gmail.com
Mon Dec 22 17:40:39 CET 2008



> -----Original Message-----
> From: coreboot-bounces at coreboot.org [mailto:coreboot-bounces at coreboot.org]
> On Behalf Of Rudolf Marek
> Sent: Sunday, December 21, 2008 3:37 PM
> To: Coreboot
> Cc: Kevin O'Connor
> Subject: [coreboot] windows XP boots with ACPI HAL
> 
> Hi all,
> 
> I had a time and finally Windows XP boots with Coreboot + Seabios. In fact
> it
> was a clean install of WXP SP2. All went fine, windows work.
> 
> I'm attaching two patches. The first (acpi-fixes2) fixes the ACPI related
> problems. Some of them were identified previously by Kevin. I had just
> solve
> right _CRS reporting for PCI0 (as required by windows). This is
> accomplished
> with the k8-utils.asl code from Aruma. There was some problem, which I
> fixed
> simply by deleting that section of the code. I used acpiexec from ACPICA
> tools
> to debug the ACPI code (acpica-unix-20081204/tools/acpiexec).
> 
> What was the missing part? Windows requires right _CRS reporting of PCI0
> bus.
> Windows needs to know platform independent way, how is I/O routed on PCI0
> bus
> (and other busses). For K8 it means to read the I/O and MMIO routing
> registers
> (same as k8resdump provides) and make it ACPI object. This was perhaps
> done
> previously on Aruma board. The actual PCI regs are read in acpi-k8 in
> modelf and
> stored as SSDT table. The k8-util.asl code will construct the resources
> from
> that SSDT table. The only catch was that it orinally added for SB also a
> resource from TOM to PCI0_min. Which was invalid. This part was simply
> deleted
> as I did not need it and it was wrong anyway.
> 
> The k8-util file is copyright by AMD but no licence. I just deleted small
> part
> so I did not added myself there.
> 
> The attached patch fixes:
> The FADT bootarch flags
> Blacklists MSI for this chipset (maybe not needed)
How could you test this?

> Adds modified amdk8_util.asl
> Adds the SSDT table to chain of tables
> Aligns the FACS correctly (this should be done for other boards)

Should we put your align macros somewhere so all boards can use them?

> Adds the _CRS method to Asus M2V-MX SE acpi DSDT.
> Fixes the FACS table length.
> 
> The second patch just monitors what else is needed to be able to boot
> SeaBIOS
> with ACPI and K8M890 VGA ROM.
> 
> Signed-off-by: Rudolf Marek <r.marek at assembler.cz>

Can we be sure about blacklisting MSI?

Everything else:
Acked-by: Myles Watson <mylesgw at gmail.com>

Thanks,
Myles





More information about the coreboot mailing list