[coreboot] HT reset hang on 690G/SB600 board Asus M2A-VM

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Thu Dec 11 17:52:33 CET 2008


Hi,

On 11.12.2008 15:27, Myles Watson wrote:
> On Thu, Dec 11, 2008 at 2:27 AM, <r.marek at assembler.cz> wrote:
>
>   
>> Change soft_reset to hard_reset.
>>     

Sorry, with that change, the machine just keeps resetting.


> You could also comment out the reset at that point to see how much farther
> you get.  It sounds like the reset isn't happening.  Can you tell from the
> factory BIOS how the resets are implemented?  Can you find that information
> from Linux ACPI handling?  Maybe it uses different IO lines than the
> supported board.
>
> Since that reset is to optimize the HT links, it will be a lot slower
> without the reset.
>   

I added code to skip the reset and now it boots further. Boot log is
attached.
My RAM configuration was two DIMMs with 2 GB each (4 GB total), but
coreboot only sees 2 GB total, so I removed one of the DIMMS. The boot
log is with that one DIMM only.

This is my diff against dbm690t:
Index: src/mainboard/amd/dbm690t/Config.lb
===================================================================
--- src/mainboard/amd/dbm690t/Config.lb	(Revision 3808)
+++ src/mainboard/amd/dbm690t/Config.lb	(Arbeitskopie)
@@ -198,7 +198,7 @@
 #Define gfx_link_width, 0: x16, 1: x1, 2: x2, 3: x4, 4: x8, 5: x12 (not supported), 6: x16
 chip northbridge/amd/amdk8/root_complex
 	device apic_cluster 0 on
-		chip cpu/amd/socket_S1G1
+		chip cpu/amd/socket_AM2
 		device apic 0 on end
 		end
 	end
@@ -214,8 +214,8 @@
 						end
 					end
 					device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x7913
-					device pci 3.0 off end # PCIE P2P bridge	0x791b
-					device pci 4.0 on end # PCIE P2P bridge 0x1914
+					#device pci 3.0 off end # PCIE P2P bridge	0x791b
+					device pci 4.0 on end # PCIE P2P bridge 0x7914
 					device pci 5.0 on end # PCIE P2P bridge 0x7915
 					device pci 6.0 on end # PCIE P2P bridge 0x7916
 					device pci 7.0 on end # PCIE P2P bridge 0x7917
Index: src/mainboard/amd/dbm690t/Options.lb
===================================================================
--- src/mainboard/amd/dbm690t/Options.lb	(Revision 3808)
+++ src/mainboard/amd/dbm690t/Options.lb	(Arbeitskopie)
@@ -289,9 +289,9 @@
 ## SPEW       9   Way too many details
 
 ## Request this level of debugging output
-default  DEFAULT_CONSOLE_LOGLEVEL=8
+default  DEFAULT_CONSOLE_LOGLEVEL=9
 ## At a maximum only compile in this level of debugging
-default  MAXIMUM_CONSOLE_LOGLEVEL=8
+default  MAXIMUM_CONSOLE_LOGLEVEL=9
 
 ##
 ## Select power on after power fail setting
Index: src/mainboard/amd/dbm690t/cache_as_ram_auto.c
===================================================================
--- src/mainboard/amd/dbm690t/cache_as_ram_auto.c	(Revision 3808)
+++ src/mainboard/amd/dbm690t/cache_as_ram_auto.c	(Arbeitskopie)
@@ -213,10 +213,12 @@
 	printk_debug("needs_reset=0x%x\n", needs_reset);
 
 
-	if (needs_reset) {
+	if (0 && needs_reset) {
 		print_info("ht reset -\r\n");
 		soft_reset();
 	}
+	print_info("FIXME: Skipping ht reset -\r\n");
+	post_code(0xcc);
 
 	allow_all_aps_stop(bsp_apicid);
 


Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/

-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: bootlog.txt
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20081211/bbf11121/attachment.txt>


More information about the coreboot mailing list