[coreboot] HT reset hang on 690G/SB600 board Asus M2A-VM

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Thu Dec 11 03:03:52 CET 2008


I'm trying to get coreboot v2 running on my Asus M2A-VM. It is very
similar to the AMD DBM690T. It has a 690G/SB600 chipset and an IT8716F

My codebase is a slightly modified amd/dbm690t target. I only changed
the CPU socket to AM2.

coreboot- Do 11. Dez 01:16:13 CET 2008 starting...
core0 started:
NC node|link=00
get_cpu_rev EAX=0x50ff2.
CPU Rev is K8_G0.
NB Revision is A12.
rs690_ht_init k8_ht_freq=0.
sb600_devices_por_init(): SMBus Device, BDF:0-20-0
SMBus controller enabled, sb revision is 0x13
sb600_devices_por_init(): IDE Device, BDF:0-20-1
sb600_devices_por_init(): LPC Device, BDF:0-20-3
sb600_devices_por_init(): P2P Bridge, BDF:0-20-4
sb600_devices_por_init(): SATA Device, BDF:0-18-0
begin msr fid, vid: hi=0x310a1212, lo=0xa0a0202
Current fid_cur: 0x2, fid_max: 0xa
Requested fid_new: 0xa
FidVid table step fidvid: 0xa
end msr fid, vid: hi=0x310a120a, lo=0xa0a020a
ht reset -

It hangs after that soft reset. No POST code, nothing else.

Any insights are appreciated.

Processor info follows:
hilbert:~ # cat /proc/cpuinfo
processor       : 0
vendor_id       : AuthenticAMD
cpu family      : 15
model           : 95
model name      : AMD Athlon(tm) 64 Processor 3000+
stepping        : 2
cpu MHz         : 1800.000
cache size      : 512 KB
fpu             : yes
fpu_exception   : yes
cpuid level     : 1
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 clflush mmx fxsr sse sse2 syscall nx mmxext fxsr_opt
rdtscp lm 3dnowext 3dnow rep_good pni cx16 lahf_lm svm extapic cr8_legacy
bogomips        : 3602.72
TLB size        : 1024 4K pages
clflush size    : 64
cache_alignment : 64
address sizes   : 40 bits physical, 48 bits virtual
power management: ts fid vid ttp tm stc



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