[coreboot] Resource Allocation discussion

Marc Jones marcj303 at gmail.com
Tue Dec 2 06:42:15 CET 2008


Hi Myles,
I will try to help..... :)

On Mon, Dec 1, 2008 at 2:37 PM, Myles Watson <mylesgw at gmail.com> wrote:
> The resource patches I submitted work fairly well, but still need a little
> help.
>
> I haven't touched subtractively decoded resources, and that's where the
> breakage is right now.
>
> Questions:
> - Who should have a resource that moves all other IO resources above 0x400
> or 0x1000?

What do you mean? By definition the subtractive port takes all
unclaimed cycles. There should be a LPC or ISA bridge in the
southbridge that forwards cycles that the legacy southbridge devices
don't claim.

> - Is one needed if subtractive resources are implemented correctly?

I don't think so. You might need to track the the subtractive bit in
the bridges so you don't try to add those resources to the bridge BAR.

> - Who is responsible for setting the top of the address range?

This should be set per mainboard but the chipset will probably have
them most influence on the value.
#define DEVICE_MEM_HIGH 0xFEBFFFFFUL is probably ok for most systems
but an easy way to override it would be good.

>    - From an earlier thread with Carl-Daniel it sounded like there are fixed
> locations for APICs that need to be avoided.  Where should these be avoided?

Yes, APICs are generally at FEC00000(IO) and FEE00000(local).

Marc




More information about the coreboot mailing list