[coreboot] [PATCH] superiotool: dump winbond hardware monitor registers

Uwe Hermann uwe at hermann-uwe.de
Mon Dec 1 15:28:22 CET 2008


On Sat, Nov 29, 2008 at 12:04:17AM +0100, Stefan Reinauer wrote:
> * Not all LDNs are switched via register offset 0x07, make it a parameter
> * add support for dumping the hardware monitor of Winbond W83627THF/THG 
>   parts with -e
> 
> Signed-off-by: Stefan Reinauer <stepan at coresystems.de>

Nice, thanks! Acked, and committed in r3784 with a few minor changes:

 - Added more RSVD entries (for all registers which are explicitly
   mentioned to be reserved in the datasheet). This includes one
   register in bank 6 (this bank was not in the original patch).

 - Use LDN_SEL in one or two more places, now that we have a #define.

 - Add
     print_vendor_chips("Winbond-HWM", hwm_table);
   to the print_winbond_chips() function to make the new dump appear
   in 'superiotool -l' output.


> +static const struct superio_registers hwm_table[] = {
> +	{0x828, "W83627THF/THG", {
> +		{NOLDN, NULL,
> +			{0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09,
> +			 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13,
> +			 0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,
> +			 0x1e,0x1f,
> +			 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
> +			 0x2b,0x2c,0x2d,0x2e,0x2f,0x30,0x31,0x32,0x33,0x34,
> +			 0x35,0x36,0x37,0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,
> +			 0x3f,
> +			 0x40,0x41,0x42,0x43,0x44,0x47,0x48,0x49,0x4a,0x4b,
> +			 0x4c,0x4d,0x4e,0x4f,EOT},
> +			{RSVD,0xff,RSVD,0xff,0x00,0x00,0x00,0x00,0x01,0x01,
> +			 0x01,0x01,0x3c,0x3c,0x0a,0x0a,RSVD,0xff,0x00,0x00,
> +			 0x00,0x01,0x01,0x3c,0x43,RSVD,0xff,0xff,RSVD,RSVD,
> +			 NANA,NANA,
> +			 NANA,NANA,NANA,NANA,NANA,RSVD,RSVD,NANA,NANA,NANA,
> +			 NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,NANA,
> +			 RSVD,RSVD,RSVD,RSVD,NANA,NANA,NANA,NANA,NANA,RSVD,
> +			 RSVD,
> +			 0x03,0x00,0x00,0xfe,0xff,0x5f,NANA,0x03,RSVD,0x44,
> +			 0x18,0x15,0x80,0x5c,EOT}},

Can you post a sample dump of this Super I/O with '-e'? The 0x4f
register here is a bit unclear, the datasheet (page 48) says that it's
16 bit. Seems like the default is 0x5c or 0xa3, depending on 0x4e bit 7?
Maybe we should make the value of 0x4e 'MISC' instead, as 0x5c is not
always correct.


> +	if (extra_dump) {
> +		regwrite(port, 0x07, 0x0b); /* Select LDN 0xb (HWM). */
                               ^^^^
                         changed to LDN_SEL


> +		      int i, int j, uint16_t port, uint8_t bank_sel)

Changed bank_sel to ldn_sel, as that's the more common name/use for it
(but both is correct, of course).


Thanks, Uwe.
-- 
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