[coreboot] k8 status

ron minnich rminnich at gmail.com
Sun Aug 24 20:32:52 CEST 2008

On Sun, Aug 24, 2008 at 11:27 AM, Carl-Daniel Hailfinger
<c-d.hailfinger.devel.2006 at gmx.net> wrote:
> On 24.08.2008 19:49, ron minnich wrote:
>> Note there are things left to do that are not at first obvious
>> 1. all core0's in initram have to load microcode
> This is going to hurt. You know that we only have 1k stack on all APs
> (that includes core0 of every non-BSP)? With some ugly trickery, I think
> 2k stack are possible, but you don't want to go there. Our v3 functions
> are not really optimized to fit into a small stack.

fam10 requires microcode load prior to ram setup. We have to make this work.

> Can't we postpone microcode loading to stage2 or at least past initram?

AMD tells me not for fam10, so we might as well get it right from the start.

question: if BSP brings up ram, can't APs use that BSP ram? Is there
any reason this would not work?


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