[coreboot] r725 - coreboot-v3/arch/x86/amd

svn at coreboot.org svn at coreboot.org
Sat Aug 9 15:45:22 CEST 2008


Author: hailfinger
Date: 2008-08-09 15:45:22 +0200 (Sat, 09 Aug 2008)
New Revision: 725

Modified:
   coreboot-v3/arch/x86/amd/stage0.S
Log:
Remove Family 10h revision Ax support from v3 CAR code. This is an
errata for early silicon and is not mentioned in the public rev guide.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: coreboot-v3/arch/x86/amd/stage0.S
===================================================================
--- coreboot-v3/arch/x86/amd/stage0.S	2008-08-06 23:31:35 UTC (rev 724)
+++ coreboot-v3/arch/x86/amd/stage0.S	2008-08-09 13:45:22 UTC (rev 725)
@@ -212,15 +212,6 @@
 
 #endif
 
-#ifdef CONFIG_CPU_AMD_K10
-	/* Errata 193: Disable clean copybacks to L3 cache to allow cached ROM.
-	   Re-enable it in after RAM is initialized and before CAR is disabled */
-	movl	$0xc001102a, %ecx
-	rdmsr
-	bts	$15, %eax
-	wrmsr
-#endif
-
 	/* Set MtrrFixDramModEn for clear fixed mtrr */
 enable_fixed_mtrr_dram_modify:
 	movl	$SYSCFG_MSR, %ecx





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