[coreboot] r3244 - trunk/coreboot-v2/src/superio/smsc/smscsuperio

svn at coreboot.org svn at coreboot.org
Sat Apr 19 15:32:19 CEST 2008


Author: uwe
Date: 2008-04-19 15:32:19 +0200 (Sat, 19 Apr 2008)
New Revision: 3244

Modified:
   trunk/coreboot-v2/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c
   trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c
Log:
This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the
generic SMSC support, and corrects a small typo.

With this patch, coreboot v2 on a mainboard with SCH3112 has been
demonstrated to correctly use the serial port.  No other chip
functions were tested.

Signed-off-by: Christopher Kilgour <techie at whiterocker.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Uwe Hermann <uwe at hermann-uwe.de>



Modified: trunk/coreboot-v2/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c	2008-04-18 20:48:22 UTC (rev 3243)
+++ trunk/coreboot-v2/src/superio/smsc/smscsuperio/smscsuperio_early_serial.c	2008-04-19 13:32:19 UTC (rev 3244)
@@ -30,7 +30,7 @@
  * Enable the specified serial port.
  *
  * @param dev The device to use.
- * @param dev The I/O base of the serial port (usually 0x3f8/0x2f8).
+ * @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
  */
 static inline void smscsuperio_enable_serial(device_t dev, uint16_t iobase)
 {

Modified: trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c
===================================================================
--- trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c	2008-04-18 20:48:22 UTC (rev 3243)
+++ trunk/coreboot-v2/src/superio/smsc/smscsuperio/superio.c	2008-04-19 13:32:19 UTC (rev 3244)
@@ -56,6 +56,7 @@
 #define LPC47B397	0x6f
 #define A8000		0x77	/* ASUS A8000, a rebranded DME1737(?) */
 #define DME1737		0x78
+#define SCH3112		0x7c
 #define SCH5307		0x81	/* Rebranded LPC47B397(?) */
 
 /* Register defines */
@@ -127,6 +128,7 @@
 	{LPC47B397,{0, 3, 4,  5, -1,  7, -1,  -1,  8,  -1, -1, -1, 10, -1, -1}},
 	{A8000,    {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},
 	{DME1737,  {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},
+	{SCH3112,  {0, 3, 4,  5, -1,  7, -1,  -1, -1,  -1, -1, -1, 10, -1, -1}},
 	{SCH5307,  {0, 3, 4,  5, -1,  7, -1,  -1,  8,  -1, -1, -1, 10, -1, -1}},
 };
 





More information about the coreboot mailing list