[LinuxBIOS] addr_offset help

Corey Osgood corey.osgood at gmail.com
Sun Sep 2 03:52:57 CEST 2007


Joseph Smith wrote:
>
>>>> MRS is a setting within the ram that's set by reading from a certain
>>>> location while the northbridge is in MRS mode. It essentially tells
>>>> the
>>>> ram what timings to run at. For the most part, the only values you'll
>>>> ever need for SDRAM are 0x1d0 for CL3 and 0x150 for CL2, but DDR and
>>>> DDR2 make more advanced use of MRS and E(xtended)MRS. Read the JEDEC
>>>> standard for more info.
>>>>
> What do you mean by this??

Think of it as setting a register in the ram. To have access to it, you
first have to send the northbridge the MRS command. While the
northbridge is in MRS mode is the only time you have access to that
register. Then the register is set by reading from the ram...except that
it doesn't really read. The northbridge, in MRS mode, interprets the
read as setting the value of the register. The value of the register is
the location that you tell it to read from. The northbridge takes care
of the process of setting the value, so that's all you need to do.

>
>> And just realized something else, directly related to the email I just
>> sent for Joe. Please change the MRS value from 0x1d0 to 0xad0. Heh, that
>> could seriously bork things up, my bad.
>>
>> -Corey
>>
>>
> What am I supposed to use for CL3?
>
>
> Thanks - Joe
>

That value (0xad0) is wrong. Anyways, the i810 datasheet says to use
Burst length 4 and interleaved burst. I'm not sure what the heck 0x1d0
is for, I thought I knew but I'm wrong. Anyways, 0x1d0 should at least
get the system running, just use it.

-Corey




More information about the coreboot mailing list