[LinuxBIOS] SPI flash

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Fri Nov 30 21:44:21 CET 2007

On 30.11.2007 13:42, Peter Stuge wrote:
> On Wed, Nov 28, 2007 at 07:14:08PM -0500, Richard Smith wrote:
>> If I can I'd also like to upgrade the SPI flash part to as big as
>> the chipset will support and if thats still not big enough to hold
>> my kernel+rootfs then change to a USB nand drive.
> I'm waiting for sales information for 32Mbit flash, and will try to
> get the moq down a bit from 1k so I can order some.

The performance of SPI flash parts is usually dependent on three factors:
* Clock frequency
* Pinout (1-Read or 2-Read or 4-Read)
* Bytes per Read command.

With the IT8716F SPI translation feature, the best possible result is:
(freq/8/2) Byte/s
That is roughly 2 MByte/s, way too slow to try to boot from it.

If you have a SPI controller which supports continuous 4-Read at 85 MHz,
you can get up to 42 MByte/s in linear reads. Such a solution would be
really nice.


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