[LinuxBIOS] v3: status on real hardware

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Thu Nov 15 01:11:41 CET 2007

On 13.11.2007 02:35, Carl-Daniel Hailfinger wrote:
> On 12.11.2007 18:07, Marc Jones wrote:
>> Carl-Daniel Hailfinger wrote:
>>> while taking a look at stage0 and stage1 code in v3, I was surprised to
>>> see no coherent structure in the code for Geode LX boards.
>>> While some of this may be due to dead code, I'd like to know:
>>> * which board can serve as structural reference
>>> * which board is working best.
>>> Once I know that, I can send cleanup patches and maybe even kill a few
>>> functions and files.   
>> I use the amd/norwich and Ron uses the adl/msm800sev. The norwich
>> mainboard is more generic but they should be very similar to each
>> other. The artecgroup mainboard is incomplete.
> Thanks for the info! I'll proceed with structural unification of the
> adl/msm800sev and amd/norwich mainboards and make the artec/dbe61
> conform to their style.

Question: Why does mainboard/adl/msm800sev/initram.c contain the
following code snippet?

int main(void)
	/* Switch from Cache as RAM to real RAM */
	printk(BIOS_SPEW, "Before wbinvd\n");
	printk(BIOS_SPEW, "After wbinvd\n");

That function is executed from arch/x86/stage1.c:stage1_main() by the
following code snippet:

	if (check_normal_boot_flag()) {
		printk(BIOS_DEBUG, "Choosing normal boot.\n");
		ret = execute_in_place(&archive, "normal/initram");
	} else {
		printk(BIOS_DEBUG, "Choosing fallback boot.\n");
		ret = execute_in_place(&archive, "fallback/initram");
		/* Try a normal boot if fallback doesn't exist in the lar.
		 * TODO: There are other ways to do this.
		 * It could be ifdef or the boot flag could be forced.
		if (ret) {
			printk(BIOS_DEBUG, "Fallback failed. Try normal boot\n");
			ret = execute_in_place(&archive, "normal/initram");

Shortly after that, in stage1_main() we find this:

	/* Turn off Cache-As-Ram */

And arch/x86/geodelx/stage1.c:disable_car() looks like this:

void disable_car(void)
	int i;

	for (i = 0; i < ARRAY_SIZE(msr_table); i++)
		wrmsr(msr_table[i].msrnum, msr_table[i].msr);


So the question is: Why do we execute wbinvd twice, once in mainboard
initram code, once directly afterwards in generic stage1 code?
Interesting tidbit: This only applies to the msm800sev and not the norwich.

> As I work through the code, I will generate a stream of patches, mostly
> for documentation and cleanup.

... and lots of questions.

> Do you have boot logs with maximum verbosity for the msm800sev or the
> norwich? If I can see them, I have a chance to improve debug printout as
> well.

These boot logs would be much appreciated.


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