[LinuxBIOS] Added mainboard commell/lv671 and compile works, but ...

[joe at smittys.pointclark.net]

Hello,

Here is a copy of the change log that I have made to the i82801db. I  
am still working on my northbridge and have not been able to test it.  
Can someone make the changes and test for me?

/*
  * This Southbridge needed some fixing up.
  * March 03, 2007
  */

chip.h
---------
changed #define ICH5R_GPIO_USE_MASK      0x03  to  #define  
ICH4_GPIO_USE_MASK      0x03
changed #define ICH5R_GPIO_USE_DEFAULT   0x00  to  #define  
ICH4_GPIO_USE_DEFAULT   0x00
changed #define ICH5R_GPIO_USE_AS_NATIVE 0x01  to  #define  
ICH4_GPIO_USE_AS_NATIVE 0x01
changed #define ICH5R_GPIO_USE_AS_GPIO   0x02  to  #define  
ICH4_GPIO_USE_AS_GPIO   0x02

changed #define ICH5R_GPIO_SEL_MASK      0x0c  to  #define  
ICH4_GPIO_SEL_MASK      0x0c
changed #define ICH5R_GPIO_SEL_DEFAULT   0x00  to  #define  
ICH4_GPIO_SEL_DEFAULT   0x00
changed #define ICH5R_GPIO_SEL_OUTPUT    0x04  to  #define  
ICH4_GPIO_SEL_OUTPUT    0x04
changed #define ICH5R_GPIO_SEL_INPUT     0x08  to  #define  
ICH4_GPIO_SEL_INPUT     0x08

changed #define ICH5R_GPIO_LVL_MASK      0x30  to  #define  
ICH4_GPIO_LVL_MASK      0x30
changed #define ICH5R_GPIO_LVL_DEFAULT   0x00  to  #define  
ICH4_GPIO_LVL_DEFAULT   0x00
changed #define ICH5R_GPIO_LVL_LOW       0x10  to  #define  
ICH4_GPIO_LVL_LOW       0x10
changed #define ICH5R_GPIO_LVL_HIGH      0x20  to  #define  
ICH4_GPIO_LVL_HIGH      0x20
changed #define ICH5R_GPIO_LVL_BLINK     0x30  to  #define  
ICH4_GPIO_LVL_BLINK     0x30

changed #define ICH5R_GPIO_INV_MASK      0xc0  to  #define  
ICH4_GPIO_INV_MASK      0xc0
changed #define ICH5R_GPIO_INV_DEFAULT   0x00  to  #define  
ICH4_GPIO_INV_DEFAULT   0x00
changed #define ICH5R_GPIO_INV_OFF       0x40  to  #define  
ICH4_GPIO_INV_OFF       0x40
changed #define ICH5R_GPIO_INV_ON        0x80  to  #define  
ICH4_GPIO_INV_ON        0x80


i82801db_ac97.c
---------------
changed .device = PCI_DEVICE_ID_INTEL_82801DB_AC97_AUDIO,  to  .device  
= PCI_DEVICE_ID_INTEL_82801DB_5,
changed .device = PCI_DEVICE_ID_INTEL_82801DB_AC97_MODEM,  to  .device  
= PCI_DEVICE_ID_INTEL_82801DB_6,


i82801db_ehci.c
---------------
changed .device = PCI_DEVICE_ID_INTEL_82801DB_EHCI,  to  .device =  
PCI_DEVICE_ID_INTEL_82801DB_13,


i82801db_ide.c
---------------
changed .device = PCI_DEVICE_ID_INTEL_82801DB_IDE,  to  .device =  
PCI_DEVICE_ID_INTEL_82801DB_11,


i82801db_lpc.c
---------------
changed switch(config->gpio[i] & ICH5R_GPIO_USE_MASK) {  to   
switch(config->gpio[i] & ICH4_GPIO_USE_MASK) {
changed case ICH5R_GPIO_USE_AS_NATIVE: val = 0; break;  to  case  
ICH4_GPIO_USE_AS_NATIVE: val = 0; break;
changed case ICH5R_GPIO_USE_AS_GPIO:   val = 1; break;  to  case  
ICH4_GPIO_USE_AS_GPIO:   val = 1; break;
changed switch(config->gpio[i] & ICH5R_GPIO_SEL_MASK) {  to   
switch(config->gpio[i] & ICH4_GPIO_SEL_MASK) {
changed case ICH5R_GPIO_SEL_OUTPUT: val = 0; break;  to  case  
ICH4_GPIO_SEL_OUTPUT: val = 0; break;
changed case ICH5R_GPIO_SEL_INPUT:  val = 1; break;  to  case  
ICH4_GPIO_SEL_INPUT:  val = 1; break;
changed switch(config->gpio[i] & ICH5R_GPIO_LVL_MASK) {  to   
switch(config->gpio[i] & ICH4_GPIO_LVL_MASK) {
changed case ICH5R_GPIO_LVL_LOW:   val = 0; blink = 0; break;  to   
case ICH4_GPIO_LVL_LOW:   val = 0; blink = 0; break;
changed case ICH5R_GPIO_LVL_HIGH:  val = 1; blink = 0; break;  to   
case ICH4_GPIO_LVL_HIGH:  val = 1; blink = 0; break;
changed case ICH5R_GPIO_LVL_BLINK: val = 1; blink = 1; break;  to   
case ICH4_GPIO_LVL_BLINK: val = 1; blink = 1; break;
changed switch(config->gpio[i] & ICH5R_GPIO_INV_MASK) {  to   
switch(config->gpio[i] & ICH4_GPIO_INV_MASK) {
changed case ICH5R_GPIO_INV_OFF: val = 0; break;  to  case  
ICH4_GPIO_INV_OFF: val = 0; break;
changed case ICH5R_GPIO_INV_ON:  val = 1; break;  to  case  
ICH4_GPIO_INV_ON:  val = 1; break;
changed .device = PCI_DEVICE_ID_INTEL_82801DB_ISA,  to  .device =  
PCI_DEVICE_ID_INTEL_82801DB_0,


i82801db_pci.c
--------------
changed .device = PCI_DEVICE_ID_INTEL_82801DB_PCI,  to  .device = 0x244e,


i82801db_smbus.c
---------------
changed .device = PCI_DEVICE_ID_INTEL_82801DB_SMB,  to  .device =  
PCI_DEVICE_ID_INTEL_82801DB_3,


i82801db_uhci.c
---------------
changed .device = PCI_DEVICE_ID_INTEL_82801DB_USB0,  to  .device =  
PCI_DEVICE_ID_INTEL_82801DB_2,
changed .device = PCI_DEVICE_ID_INTEL_82801DB_USB1,  to  .device =  
PCI_DEVICE_ID_INTEL_82801DB_4,
changed .device = PCI_DEVICE_ID_INTEL_82801DB_USB2,  to  .device =  
PCI_DEVICE_ID_INTEL_82801DB_7,


i82801db_watchdog.c
---------------
changed /* turn off the ICH5 watchdog */  to  /* turn off the ICH4 watchdog */
changed printk_debug("Watchdog ICH5 disabled\r\n");  to   
printk_debug("Watchdog ICH4 disabled\r\n");



ADDED NIC SUPPORT

Added file: i82801db_nic.c

Added this line to Config.lb: driver i82801db_nic.o



Thanks - Joe

Quoting Dieter Bloms <dieter at bloms.de>:

> Hi,
>
> I added my new board to mainboards and successfully compile with
> northbridge i855pm and i82801dbm southbridge.
>
> After flashing and reboot I get beep beep beep 2 times per second.
> And there is nothing to see on serial output.
>
> I know, that the i855pm is not fully supported and I'm waiting for the
> patches from Joe, but I thought the serial console may work without it.
>
> Maybe someone is willing to check my config so far.
> The most stuff is stolen from digitallogic/adl855pc directory.
>
> It would be nice to get the serial console to work in the first step, so
> I can see what is wrong with the other stuff.
>
> I've uploaded a tar.gz to:
>
> http://www.bloms.de/download/commel_lv671.tar.gz
>
> It is only 9K big ;)
>
> Thank you for your help.
>
>
> --
> Gruß
>
>   Dieter
>
> --
> I do not get viruses because I do not use MS software.
> If you use Outlook then please do not put my email address in your
> address-book so that WHEN you get a virus it won't use my address in the
> From field.
>