[LinuxBIOS] Question about protect mode?

[Juergen Beisert]

Hi,

On Thursday 31 May 2007 11:00, Yuning Feng wrote:
> To Xia-yin: Processor manual does help. Of course, explanation from
> people here is more specific.
>
> 2007/5/30, Feng, Libo <Libo.Feng at amd.com>:
> > Another question is BIOS ROM can attach to XBUS, LPC, someone told me,
> > even PCI, how dose the address forward to the location?
>
> To Libo and Juergen: It seems not every board can do that. Would you
> name some of them ?

Hmm, every board *must" do it. The CPU outputs the address 0xFFFFFFF0 and 
awaits to read its first instruction. The external chipset (if not a SoC) is 
responsible to generate a chip select signal to a device that contains this 
instruction(s) and to forward the "answer" from this device back to the CPU 
data bus. So every board can do it, but maybe not all variants listed above. 
Maybe only one of it, or maybe more than one of it. In the latter case you 
must select in a _chipset_specific_way_ where the device is connected that 
contains the boot code. So you should not read processor's manual, you should 
read chipset's manual instead (for the case they are separate devices. On 
SoCs they are combined in one silicon).

> Maybe a silly question: Isn't it that PCI needs initialization before
> we could access it? How could we get there when the processor is
> fetching the 1st instruction?

In this case the ROM device is connected to the PCI bus, but not connected 
_as_ a PCI device!. It shares the PCI bus address/data lines only to save an 
additional bus.
If you reuse (or misuse?) the AD[31...0] lines you can connect up to a 16MiB 
ROM device with 8 bit data width (AD[31...8] as addressbus, AD[7..0] as data 
bus). Add also three separate additional lines (read, write, chip select) and 
you are done. Whenever the chipset generates a ROM device access cycle, it 
does not generate a valid PCI cycle as it only uses the AD[31...0] lines! So 
this does not hurt any other *real* PCI device on the same bus.
But this may work only at system start. Later on some PCI master devices could 
inhibit this mode. But it doesn't matter: At this point of time the ROM 
content runs from system RAM, so there is no more need to access the real ROM 
device (maybe only to reprogramm it).

Hope it helps.

Juergen