[LinuxBIOS] SPD Logical and Physical Banks

Corey Osgood corey_osgood at verizon.net
Tue May 15 22:24:26 CEST 2007


Uwe Hermann wrote:
> On Tue, May 15, 2007 at 04:03:19PM -0400, Corey Osgood wrote:
>>> Just to prevent unnecessary duplicated work: please don't write
>>> SPD-related functions for 440BX. I'm about to finish a patch which moves
>>> all generic SPD-related functions into src/sdram/spd.c where all
>>> chipsets can use them.
>>>
>>> The SPD-only stuff should be chipset-independent, only the
>>> chipset-specific stuff should be handled in the respective raminit.c.
>> That figures. Just finished a ton of SPD stuff for the 440bx last night.
> 
> Hm, sorry... I only started on this patch today, I hope this didn't
> cause too much trouble...
> 
> I'll post a draft soon, so that people can see which functions are
> affected. This needs an abuild-run and tests on a bunch of different
> hardware targets to make sure nothing breaks...

Well, if you want to compare notes at all, I've attached my raminit.c
(the file, not a patch). If you could, please maintain the MODEL_440ZX
stuff, as that's necessary for 440zx support. MODEL_440ZX will be
defined in the mainboard auto.c, once this is all up and running, and
those ifdef's are the ONLY differences between the two northbridges.
However, there's no way to detect the difference at runtime that I can
find, so a define is the only real way.

>> Any luck on getting cache-as-ram going? I'm running out of registers
>> with my code, perhaps yours is more register-friendly.
> 
> I have a version which _compiles_, but I haven't tested on real hardware
> whether it actually works. Will do so soon, though.

Well, good luck! I've got the rest of the day free, so I hope to hear
from you soon.

-Corey
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