[LinuxBIOS] about cs5536 configuration

[Songmao Tian]

Hi Marc,
Thank you, I will check that:)


Marc Jones wrote:
>
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> Songmao Tian wrote:
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>> Hi all,
>>    I have read cs5536 databook carefully, but still puzzled about how 
>> the pci configure space of various functions show up?
>>
>>    Is it the config in southbridge/amd/cs5536/cs5536.c makes it?
>>
>> /*    Master Configuration Register for Bus Masters.*/
>> struct msrinit SB_MASTER_CONF_TABLE[] = {
>>    {USB2_SB_GLD_MSR_CONF, {.hi = 0,.lo = 0x00008f000}},
>>    {ATA_SB_GLD_MSR_CONF,  {.hi = 0,.lo = 0x00048f000}},
>>    {AC97_SB_GLD_MSR_CONF, {.hi = 0,.lo = 0x00008f000}},
>>    {MDD_SB_GLD_MSR_CONF,  {.hi = 0,.lo = 0x00000f000}},
>>    {0, {0, 0}}
>> };
>>
>>
>>
>> Songmao
>>  
>>
>
> Hi Songmao,
> The internal PCI devices are virtualized. The VSA2 SMI handler does 
> the virtualization. It links the virtual BAR to real hardware 
> registers so programmers don't need to do the proprietary setup 
> (LBARS). It is fairly complicated if you are interested in how VSA2 
> does this you can find the source here: 
> http://dev.laptop.org/git?p=geode-vsa;a=summary .
>
> The msrinit table is setting up the 0x01 MSR registers in the cs5536 
> that set the coherency and prefetch settings.
>
> So, try look for LBAR_ in the databook and you will find the 
> trap/routing that get setup to match the PCI BAR.
> I hope this helps.
> Marc
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