[LinuxBIOS] [PATCH] flashrom: Acorp 6A815EPD board-enable

[jakllsch at kollasch.net]

On Sun, Dec 02, 2007 at 08:05:09PM +0100, Uwe Hermann wrote:
> On Mon, Nov 26, 2007 at 05:24:25PM -0600, jakllsch at kollasch.net wrote:
> > Add board-enable for Acorp 6A815EPD.
> > 
> > Signed-off-by: Jonathan A. Kollasch <jakllsch at kollasch.net>
> 
> Thanks, committed in r2995.
> 
> 
> > +	dev = pci_dev_find(0x8086, 0x2440);     /* Intel ICH2 LPC */
> > +	if (!dev) {
> > +		fprintf(stderr, "\nERROR: ICH2 LPC bridge not found.\n");
> > +		return -1;
> > +	}
> > +
> > +	/* use GPIOBASE register to find where the GPIO is mapped */
> > +	port = (pci_read_word(dev, 0x58) & 0xFF80) + 0xE;
> 
> Maybe I have a thinko, but shouldn't this be 0xffc0 instead of 0xff80?

You are correct ... feel free to fix that.
Apparently this patch needed *a bit* more work. :P

> 
> 
> > +
> > +	val = inb(port);
> > +	val |= 0x80; /* Top Block Lock -- pin 8 of PLCC32 */
> > +	val |= 0x40; /* Lower Blocks Lock -- pin 7 of PLCC32 */
> 
> This is board-specific I assume? Did you trace the connections going to
> the ROM to find the specific lines?

Yes. I traced them across and through the board to under the
southgate. After I got some hints from the 'AWDFLASH' page
provided by the stock BIOS, I poked at the I/O port,
measured the voltage at those pins ...

	Jonathan Kollasch
-------------- next part --------------
A non-text attachment was scrubbed...
Name: not available
Type: application/pgp-signature
Size: 189 bytes
Desc: not available
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20071202/8ce0f3e6/attachment.sig>