[LinuxBIOS] Need help on epia vt8601 issues

[Mark Wilkinson]

Hello Richard, Ben, Uwe, et all

  I've been following this thread for a little while, and have this 2 
pence ( or 2 cents for the US/rest of Europe) to add.

Based on the conversations, I've pulled the following rev's (based on 
changes to the raminit.c)  and tried building using the gcc 3.4.4 toolset.

*REV*
	
*Build*
*linuxbios.rom*
	*Reason for Failure*
1131 	Failed
	No Target !! - looks like the via/epia target directory only exists 
from rev 1138
1138 	no src/arc/i386/config/crt0.bast
1151
1154
1155
1156
1157
1159
1177
1179
1180
1227
1228
1259 	Couldn't Parse Config file
1618 	compile error - unsigned long long no supported
1619
1726 	Success
	
1808 	
1952 	Failed
	No rule to make target src/southbrigde/via/vt8231/vt8231_lpc.c needed 
by vt8321_lpc.o
1954 	Success
	
1978 	



Output from Manufacturers Bios :-

00:00.0 Host bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia] (rev 05)
00: 06 11 01 06 06 00 90 a2 05 00 00 06 00 08 00 00
10: 08 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 10 60
30: 00 00 00 00 a0 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: fe df c8 98 00 00 10 10 80 00 08 10 10 10 10 10
60: 3f 2a 00 20 e6 95 95 c4 42 ac 65 0d 08 7f 00 00
70: c0 88 ec 0c 0e 81 52 00 01 f4 01 00 00 00 00 00
80: 0f 40 00 00 00 00 00 00 03 00 68 07 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 02 00 20 00 07 02 00 07 00 00 00 00 6e 02 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 01 01 22 42 00 b0 00 08 00 00

Out of the 4 successes, I've trued the first 2 and have only gotten as 
far as the 'vt8601 done'

I've not modified the code to dump the registers yet, and the problem 
could be that the default config of PC100 and CL3 doesn't work for my 
ram which is causing it to hang after the raminit.

Hope this helps.

I'm going to try and get my system here install with serveral version of 
the gcc toolchain if I can

If there's anything you want me to try, or a particular version of gcc 
to try, I'll give it a go if I can as I'd love to see this board (I have 
both an epia 800 and epia 5000 ) working on LBv2 just as it did uner LBv1

Regards
Mark Wilkinson.

Ben Hewson wrote:

> Richard Smith wrote:
>
>>On 9/6/06, Ronald G Minnich <rminnich at lanl.gov> wrote:
>>  
>>
>>>I will attempt to get you a rom image of a working linuxbios rom
>>>tonight. I have one.
>>>
>>>    
>>>
>>
>>That would be a magic bullet.  If we can boot that, dump the
>>northbridge settings and compare vs what LB is currently doing then we
>>know a _lot_.  If they are the same then I think we have strong
>>evidence that something in the newer chips is different.
>>
>>Please send it to "Alex Mauer" <hawke42 at gmail.com> and cc me.
>>
>>  
>>
> when I get another PSU I'll boot my board up with the original bios 
> and dump the northbridge settings.
> The board I am working on is rev D. I have another board in use as a 
> firewall and that is a rev A so I could possibly see if that works any 
> better or if there are any details.
>
> There are a couple of bits in the code I don't quite get. Also the 
> VT8601A datasheet mentions a BIOS porting guide. Does anyone have a 
> copy of that. The actual VT8601A datasheet doesn't go into any detail 
> on configuring ram.
>
> Have also been looking at an SDRAM datasheet to see how that gets 
> initialised. One of the bits I don't quite get is writing the SDRAM 
> mode register (either 0x150 or 0x1d0 ). Can't see how that matches up 
> to the SDRAM mode register bits and would'nt the MA mapping have an 
> effect on that. The MA mapping register doesn't get written until later.
>
>
> Currently using v3 something of gcc will need to check, again when I 
> get a PSU.
>
> Ben
>
>
>

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