[LinuxBIOS] Support for recent chipset and powerful desktop CPU

[Segher Boessenkool]

>> You typically need to set up quite a bit of the PCI subsystem
>> for it to work -- including not only bridges and devices on
>> the path to the PCI function you're interested in, but also
>> any siblings of any such.
>
> Why would that be?

Because you don't want two devices claiming the same
transaction.

>> And you need to do some work with
>> the north bridge typically (open up some window there).
>
> thanks for the compat chain that we reliably have on x86, all of the
> above is a noop on 100% of our currently supported machines.

But the EHCI controller's BAR isn't on the "compat chain".
It's not subtractively decoded.  It's a memory BAR as well
(is it?), so on x86 you need to set MTRR regs, etc.

> If we happen to see a system where this actually matters, we can
> still decide not to go ehci if we find a simpler solution, but lets  
> not
> talk this dead for no realworld reason now.

I'm not saying not to use the EHCI debug port.  I'm just
saying it's not nearly as simple as legacy serial to get
working.

But yes, let's drop the discussion for now, someone should
write some code for this and we can discuss that instead :-)


Segher