[LinuxBIOS] MB1030 / 3036 VGA comes up :D
chris at suehsi.de
Fri May 5 10:40:03 CEST 2006
Richard Smith schrieb:
>> so the question is, is there a range descriptor hidden somewhere that is
>> controlling this. There are such registers in GX2 AND SC520 AND ....
>> it's common in this embedded stuff. What are we missing? Where are the
>> docs on this chip. I can try to read them.
> Anybody know if the tools on the AMD developer site can read all the
> setup registers in the gx1 and dump them out? From looking at the
> data sheet a lot of the stuff we probably need to be diffing vs
> factory won't show up in an lspci -xxx.
> Richard A. Smith
I'm not sure, did you recieve that ?
As I say. The main settings done by LB to the cpu register are ok.
There is nothing, what seems to be wrong, but look here.
>> -// LinuxBios
>> +// Factory Bios
>> 00:00.0 0600: 1078:0001
>> -00: 78 10 01 00 47 01 80 83 00 00 00 06 00 00 00 00
>> +00: 78 10 01 00 07 00 80 02 00 00 00 06 00 00 00 00
> ^^^^^ ^^^^^ ^^^^^ ^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^
> VID DID PCI Device default values
> PCI Command is different and Device Status differs
> PCI Command (default 0007h set by factory)
> LB enables two additional functions for the PCI Command registers.
> 1. Processor checks for parity errors
> 2. SERR# enabled (is used for a special SERR driver ?!)
> Device Status (default 0280h (RO) set by factory)
> If I understand that right, the differences here results of the enabled Parity Error checks.
> This register is to read out those errors and is cleard by a R/W on this register.
> Check for errors means a lowered perfomance, right??
> Unfortunatly, I can't find the sections in the LB Code, were this is done.
I can't find the section, were these registers are set in LB
Later I found them too in the other devices on the bus, like 00:12.0
>> One of those is busmastering iirc.
> Busmaster for the northbridge is enabled in both cases.
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