[LinuxBIOS] 440BX progress.

Segher Boessenkool segher at kernel.crashing.org
Sun Dec 3 11:53:59 CET 2006

>> You need to do this init sequence for every rank of
>> memory.  Using each DRB gives you a lot of duplicates,
>> which can be harmless; it can also give you 0 as the
>> top-of-rank address (if the first ranks are empty)
>> which is bad.
> no, not really duplicates, I think. You set up the DRBs for max size,
> you do all the DRAM setup, you size the actual RAM and reprogram the
> DRBs. This will work even if there is air in the socket. It ensures
> that a single DRB does not hit the same DRAM bank.

Yes, if you set up the DRBs so that no DRAM ranks are overlapping,
you can program them all separately.  This is the kind of thing
people do if they cannot read the SPDs or just don't want to for
some reason (many fuctory BIOSes do).

At some later stage you'll have to program the DRBs properly; and
you cannot change the config while the DRAM controller is active
(even the i440 "specification update" warns against this) -- the
kind of CPUs attached to this chip won't do any prefetch or similar,
so you actually *can* make this work, but in principle it's a bad
idea to change settings on a running memory controller.

If you use the SPDs properly (or at all!), you really don't have
to fall back to tricks like this.


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