[LinuxBIOS] r2389 - in trunk/LinuxBIOSv2/src: include/cpu/amd southbridge/amd/cs5536
svn at openbios.org
svn at openbios.org
Fri Aug 25 18:14:31 CEST 2006
Author: rsmith
Date: 2006-08-25 18:14:31 +0200 (Fri, 25 Aug 2006)
New Revision: 2389
Modified:
trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h
trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c
Log:
- USB P4 as host fix
This should make the USB P4 work as a USB host
Modified: trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h
===================================================================
--- trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h 2006-08-25 14:06:48 UTC (rev 2388)
+++ trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h 2006-08-25 16:14:31 UTC (rev 2389)
@@ -706,6 +706,8 @@
/* SouthBridge Equates*/
/* MSR_SB and SB_SHIFT are located in CPU.inc*/
+#define MSR_SB_USB2_MEM_DES ((1<<16) + MSR_SB + 0x25) /* Hack to make USB P4 work */
+
#define MSR_SB_GLIU ((9 << 14) + MSR_SB) /* 51024xxx or 510*xxxx - fake out just like GL0 on CPU. */
#define MSR_SB_GLPCI (MSR_SB) /* 5100xxxx - don't go to the GLIU */
#define MSR_SB_USB2 ((2 << SB_SHIFT) + MSR_SB) /* 5120xxxx */
Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c
===================================================================
--- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 14:06:48 UTC (rev 2388)
+++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 16:14:31 UTC (rev 2389)
@@ -157,19 +157,19 @@
volatile unsigned long* uocmux;
unsigned long val;
- printk_err("Base 0x%08x\n",USB2_SB_GLD_MSR_CAP);
+
+ printk_err("DES 0x%08x\n",MSR_SB_USB2_MEM_DES);
- msr = rdmsr(USB2_SB_GLD_MSR_CAP);
- printk_err("CAP 0x%08x%08x\n", msr.hi,msr.lo);
+ msr = rdmsr(MSR_SB_USB2_MEM_DES);
+ printk_err("DES 0x%08x%08x\n", msr.hi,msr.lo);
- msr = rdmsr(USB2_SB_GLD_MSR_OHCI_BASE);
- printk_err("OHCI base 0x%08x%08x\n", msr.hi,msr.lo);
+ msr.hi = 0x400000fe;
+ msr.lo = 0x010fffff;
- msr = rdmsr(USB2_SB_GLD_MSR_EHCI_BASE);
- printk_err("EHCI base 0x%08x%08x\n", msr.hi,msr.lo);
+ wrmsr(MSR_SB_USB2_MEM_DES, msr);
- msr = rdmsr(USB2_SB_GLD_MSR_DEVCTL_BASE);
- printk_err("DevCtl base 0x%08x%08x\n", msr.hi,msr.lo);
+ msr = rdmsr(MSR_SB_USB2_MEM_DES);
+ printk_err("New DES 0x%08x%08x\n", msr.hi,msr.lo);
msr = rdmsr(USB2_SB_GLD_MSR_UOC_BASE);
printk_err("Old UOC Base 0x%08x%08x\n", msr.hi,msr.lo);
@@ -185,13 +185,15 @@
val = *uocmux;
printk_err("UOCMUX is 0x%lx\n",val);
-#if 0
- val &= ~(0xc0);
+
+ val &= ~(0x3);
val |= 0x2;
*uocmux = val;
-#endif
+ val = *uocmux;
+ printk_err("New UOCMUX is 0x%lx\n",val);
+
}
}
More information about the coreboot
mailing list