Hypertransport Speed
Stefan Reinauer
stepan at openbios.org
Tue Jan 25 23:49:00 CET 2005
Hi,
I would like to check the applied patch into LinuxBIOS CVS if nobody
happens to disagree loudly:
1) hypertransport clocking
This patch allows to disable the speed cuts during hypertransport
setup using cmos variables "amdk8_1GHz" and "amd8131_800MHz".
I've tried them on hardware which worked perfectly fine
with the higher speed links for both devices (K8 and 8131).
Since it is disabled per default and needs cmos and compile time
activation, it will not break anything.
Affected files:
src/config/Options.lb
src/devices/hypertransport.c
src/northbridge/amd/amdk8/coherent_ht.c
src/northbridge/amd/amdk8/incoherent_ht.c
2) ram init
This patch allows to use 8x (and probably 16x) dimms with LinuxBIOS
on K8.
Affected files:
src/northbridge/amd/amdk8/raminit.c
3) Debugging
This patch will print the pci vendor/device id in print_pci_devices()
which makes determining the early bus structure a lot easier.
It also only prints the first 128 bytes of SPDROM during
dump_spd_registers() since they are defined to be 128byte.
Affected files:
src/northbridge/amd/amdk8/debug.c
Stefan
-------------- next part --------------
Index: src/config/Options.lb
===================================================================
RCS file: /cvsroot/freebios/freebios2/src/config/Options.lb,v
retrieving revision 1.56
diff -u -r1.56 Options.lb
--- src/config/Options.lb 14 Jan 2005 21:54:16 -0000 1.56
+++ src/config/Options.lb 26 Jan 2005 09:50:04 -0000
@@ -815,3 +815,13 @@
export never
comment "Configure briQ with PowerPC G4"
end
+###############################################
+# Options for amd k8
+###############################################
+define ALLOW_HT_OVERCLOCKING
+ default 0
+ export always
+ comment "Allow K8 and AMD8131 to operate at maximum speed"
+end
+
+
Index: src/devices/hypertransport.c
===================================================================
RCS file: /cvsroot/freebios/freebios2/src/devices/hypertransport.c,v
retrieving revision 1.12
diff -u -r1.12 hypertransport.c
--- src/devices/hypertransport.c 19 Jan 2005 01:19:37 -0000 1.12
+++ src/devices/hypertransport.c 26 Jan 2005 09:50:04 -0000
@@ -7,6 +7,9 @@
#include <device/hypertransport.h>
#include <part/hard_reset.h>
#include <part/fallback_boot.h>
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+#include <pc80/mc146818rtc.h>
+#endif
static device_t ht_scan_get_devs(device_t *old_devices)
{
@@ -29,6 +32,9 @@
{
/* Handle bugs in valid hypertransport frequency reporting */
unsigned freq_cap;
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+ int on;
+#endif
freq_cap = pci_read_config16(dev, pos);
freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies */
@@ -36,7 +42,12 @@
/* AMD 8131 Errata 48 */
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+ on=0; get_option(&on, "amd8131_800MHz");
+ if(!on) freq_cap &= ~(1 << HT_FREQ_800Mhz);
+#else
freq_cap &= ~(1 << HT_FREQ_800Mhz);
+#endif
}
/* AMD 8151 Errata 23 */
if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
@@ -45,7 +56,12 @@
}
/* AMD K8 Unsupported 1Ghz? */
if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+ on=0; get_option(&on, "amdk8_1GHz");
+ if(!on) freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#else
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#endif
}
return freq_cap;
}
Index: src/northbridge/amd/amdk8/coherent_ht.c
===================================================================
RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/coherent_ht.c,v
retrieving revision 1.40
diff -u -r1.40 coherent_ht.c
--- src/northbridge/amd/amdk8/coherent_ht.c 7 Jan 2005 21:12:05 -0000 1.40
+++ src/northbridge/amd/amdk8/coherent_ht.c 26 Jan 2005 09:50:04 -0000
@@ -266,7 +266,13 @@
/* AMD 8131 Errata 48 */
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
- freq_cap &= ~(1 << HT_FREQ_800Mhz);
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+ if(!read_option(CMOS_VSTART_amd8131_800MHz,
+ CMOS_VLEN_amd8131_800MHz, 0))
+ freq_cap &= ~(1 << HT_FREQ_800Mhz);
+#else
+ freq_cap &= ~(1 << HT_FREQ_800Mhz);
+#endif
}
/* AMD 8151 Errata 23 */
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
@@ -274,7 +280,13 @@
}
/* AMD K8 Unsupported 1Ghz? */
if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
- freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+ if(!read_option(CMOS_VSTART_amdk8_1GHz,
+ CMOS_VLEN_amdk8_1GHz, 0))
+ freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#else
+ freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#endif
}
return freq_cap;
}
Index: src/northbridge/amd/amdk8/incoherent_ht.c
===================================================================
RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/incoherent_ht.c,v
retrieving revision 1.15
diff -u -r1.15 incoherent_ht.c
--- src/northbridge/amd/amdk8/incoherent_ht.c 20 Jan 2005 20:41:17 -0000 1.15
+++ src/northbridge/amd/amdk8/incoherent_ht.c 26 Jan 2005 09:50:04 -0000
@@ -1,6 +1,7 @@
/*
This should be done by Eric
- 2004.12 yhlu add multi ht chain dynamically support
+ 2004.12 yhlu add multi ht chain dynamically support
+ 2005.01 stepan add HT overclocking feature
*/
#include <device/pci_def.h>
#include <device/pci_ids.h>
@@ -96,7 +97,13 @@
/* AMD 8131 Errata 48 */
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8131_PCIX << 16))) {
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+ if(!read_option(CMOS_VSTART_amd8131_800MHz,
+ CMOS_VLEN_amd8131_800MHz, 0))
+ freq_cap &= ~(1 << HT_FREQ_800Mhz);
+#else
freq_cap &= ~(1 << HT_FREQ_800Mhz);
+#endif
}
/* AMD 8151 Errata 23 */
if (id == (PCI_VENDOR_ID_AMD | (PCI_DEVICE_ID_AMD_8151_SYSCTRL << 16))) {
@@ -104,7 +111,13 @@
}
/* AMD K8 Unsupported 1Ghz? */
if (id == (PCI_VENDOR_ID_AMD | (0x1100 << 16))) {
+#if (ALLOW_HT_OVERCLOCKING==1) && (USE_FALLBACK_IMAGE==0)
+ if(!read_option(CMOS_VSTART_amdk8_1GHz,
+ CMOS_VLEN_amdk8_1GHz, 0))
+ freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#else
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
+#endif
}
return freq_cap;
}
-------------- next part --------------
Index: src/northbridge/amd/amdk8/raminit.c
===================================================================
RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/raminit.c,v
retrieving revision 1.26
diff -u -r1.26 raminit.c
--- src/northbridge/amd/amdk8/raminit.c 14 Oct 2004 22:06:29 -0000 1.26
+++ src/northbridge/amd/amdk8/raminit.c 26 Jan 2005 09:50:05 -0000
@@ -1603,7 +1603,7 @@
dimm += DCL_x4DIMM_SHIFT;
dcl = pci_read_config32(ctrl->f2, DRAM_CONFIG_LOW);
dcl &= ~(1 << dimm);
- if (value == 4) {
+ if (value >= 4) {
dcl |= (1 << dimm);
}
pci_write_config32(ctrl->f2, DRAM_CONFIG_LOW, dcl);
-------------- next part --------------
Index: src/northbridge/amd/amdk8/debug.c
===================================================================
RCS file: /cvsroot/freebios/freebios2/src/northbridge/amd/amdk8/debug.c,v
retrieving revision 1.3
diff -u -r1.3 debug.c
--- src/northbridge/amd/amdk8/debug.c 14 Dec 2004 01:56:55 -0000 1.3
+++ src/northbridge/amd/amdk8/debug.c 26 Jan 2005 09:50:04 -0000
@@ -27,6 +27,10 @@
continue;
}
print_debug_pci_dev(dev);
+ print_debug(" ");
+ print_debug_hex16(id & 0xffff);
+ print_debug(" ");
+ print_debug_hex16((id>>16) & 0xffff);
print_debug("\r\n");
}
}
@@ -99,7 +103,7 @@
print_debug_hex8(i);
print_debug(".0: ");
print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
+ for(j = 0; j < 128; j++) {
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
@@ -125,7 +129,7 @@
print_debug_hex8(i);
print_debug(".1: ");
print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
+ for(j = 0; j < 128; j++) {
int status;
unsigned char byte;
if ((j & 0xf) == 0) {
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