PCI IRQ tables

Yinghai Lu yhlu at tyan.com
Tue Oct 19 12:09:14 CEST 2004


To use PIC in you configuration, you need program 8111 0x56 about int
routing

                        /* initialize PCI interupts - these assignments
depend
                        on the PCB routing of PINTA-D 

                        PINTA = IRQ5
                        PINTB = IRQ9
                        PINTC = IRQ11
                        PINTD = IRQ10
                        */
                        pci_write_config16(dev, 0x56, 0xab95);

Then you need to program  all device in PCI-X slot with
        printk_info("setting Slot 2\n");
        static const unsigned char slotIrqs_8131_2_1[4] = { 9, 11, 10, 5 };
        pci_assign_irqs(bus_8131_2, 1, slotIrqs_8131_2_1);
that will update the interrupt line for every device in slot.

Please remember you need to make sure your HW connection about INT.

Then you can use NO SMP Kernel with apic disabled.

Regards

YH

-----Original Message-----
From: Liu Tao [mailto:liutao at safe-mail.net] 
Sent: Monday, October 18, 2004 9:13 PM
To: YhLu
Cc: Dave Aubin; linuxbios at clustermatic.org
Subject: Re: PCI IRQ tables

Hello,

Thanks for your answer:)
But I'm still not very clear of the PCI interrupt
routing for legacy PIC mode on AMD64. For example in
s2885 mainboard the pirq table specifys the AMD8111
as the interrupt router (bus1 dev4 fn3), then how
does the interrupt from the PCIX devices on AMD8131
routed to CPU?

Or does the interrupt router in pirq table only
responses of legacy 32bitPCI/ISA devices, and Linux
handles all the AMD8131?

Another question is, if use IO-APIC, does linuxbios
specify the bus/devfn in mptable and let linux
do the real job of setting the IO-APIC registers?

Best Regards,
Liu Tao

YhLu wrote:

 >It's the same if you enable io apic.
 >
 >In the irq-table.
 >
 >Add
 >Entry Bus 1 for 8111 and 8131
 >Other 8131 bus may be discovered by Kernel.
 >




More information about the coreboot mailing list