FYI: Merge in progress...

Li-Ta Lo ollie at lanl.gov
Mon Oct 18 12:32:00 CEST 2004


On Mon, 2004-10-18 at 11:04, Eric W. Biederman wrote:
> Li-Ta Lo <ollie at lanl.gov> writes:
> 
> > On Sat, 2004-10-16 at 11:03, Yinghai Lu wrote:
> > > So chip tree is merged into device tree.
> > > 
> > > I'm eager to convert my MB to use that.
> > > 
> > > Is there any problem for different inherent links in second K8?
> > > 
> > 
> > I am a little bit confused with that too. I think now the 'link' keyword
> > is not used anymore, the device enumeration code will put the 2nd 
> > northbridge on the right LDT accroding to the early HT enumertion.
> 
> Sorry, for not making this clearer.  Look at the generated static.c
> if my following explanation does not clear things up.
> 
> The device tree from the HDAMA mainboard Config.lb is below:
> The first time device pci 18.0 is mentioned that is link[0] in for the device.
> The second time is link[1] the third time is link[2]...
> 
> And then the amdk8 code maps link[0] to LDT0 link[1] to LD[1 and link[2] to LDT2.
> 
> A similar condition exists for the phillips pca9545 i2c switch.
> It only has one register but it has 4 downstream ports.  
> 
> We may want to do something cleaner than just repeating the device once for
> each ``link/bus'' but for now that works.
> 

I think YHLu's question is that the CPU0 and CPU1 are connected by LDT1 
one each side. So how do we say
	northbridge_18_0.link[0].something = northbridge_19_0
and
	northbridge_19_0.link[0].something = northbridge_18_0
in the config file ?

Or it will be set dynamically at run time ?

Ollie
  




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