Tom Warren twarren at
Fri Aug 20 11:28:01 CEST 2004


If you have specific Nvidia chipset questions, you can ask me directly,
or I can point you to our developer liaison.

All of our chipsets use SIP tables to allow autoprogramming of (AMD) CPU
link defaults, MAC addresses, etc. The pointers to these 2 tables (safe
and user) are at 0xFFFFFFE0 and 0xFFFFFFE4 (dwords). Some of the table
format might be proprietary, depending on the chipset.

What was Eric's original question? I didn't see it come across the

- Tom Warren

-----Original Message-----
From: linuxbios-admin at
[mailto:linuxbios-admin at] On Behalf Of YhLu
Sent: Thursday, August 19, 2004 5:07 PM
To: ebiederman at
Cc: linuxbios at


I'm debug the one Opteron MB with NV CK 804.

That chipset (SB) can use ROM Strap to set some register before control
is handed to CPU.

But the space it need about 0xffffffe00 to 0xfffffef. 

I guess that add and could solve the problem.
And it is only needed by fallback.

Please advise.



Linuxbios mailing list
Linuxbios at

More information about the coreboot mailing list