cpu/p6/mtrr.c

SONE Takeshi ts1 at tsn.or.jp
Mon Oct 20 04:54:00 CEST 2003


On Sat, Oct 18, 2003 at 06:37:55PM -0600, Eric W. Biederman wrote:
> > EPIA has problem with current CVS (resets when setting var mtrr),
> > and it worked again when I reversed this change.
> > According to the Intel System Programming Manual for PIII,
> > bits 36-63 are reserved, and apparently C3 doesn't like it to be set.
> 
> Ok.  Then this needs to be fixed.  I am wondering how we code
> this cleanly.

I don't know if this is clean but it should be ok for both K8 and others.
Tested on C3.

-- 
Takeshi



Index: src/cpu/p6/mtrr.c
===================================================================
RCS file: /cvsroot/freebios/freebios2/src/cpu/p6/mtrr.c,v
retrieving revision 1.5
diff -u -r1.5 mtrr.c
--- src/cpu/p6/mtrr.c	11 Oct 2003 06:20:17 -0000	1.5
+++ src/cpu/p6/mtrr.c	20 Oct 2003 09:17:16 -0000
@@ -31,6 +31,14 @@
 
 #define arraysize(x)   (sizeof(x)/sizeof((x)[0]))
 
+#ifdef k8
+# define ADDRESS_BITS 40
+#else
+# define ADDRESS_BITS 36
+#endif
+#define ADDRESS_BITS_HIGH (ADDRESS_BITS - 32)
+#define ADDRESS_MASK_HIGH ((1u << ADDRESS_BITS_HIGH) - 1)
+
 static unsigned int mtrr_msr[] = {
 	MTRRfix64K_00000_MSR, MTRRfix16K_80000_MSR, MTRRfix16K_A0000_MSR,
 	MTRRfix4K_C0000_MSR, MTRRfix4K_C8000_MSR, MTRRfix4K_D0000_MSR, MTRRfix4K_D8000_MSR,
@@ -91,12 +99,14 @@
 	base.hi = basek >> 22;
 	base.lo  = basek << 10;
 
+	//printk_debug("ADDRESS_MASK_HIGH=%#x\n", ADDRESS_MASK_HIGH);
+
 	if (sizek < 4*1024*1024) {
-		mask.hi = 0x0FF;
+		mask.hi = ADDRESS_MASK_HIGH;
 		mask.lo = ~((sizek << 10) -1);
 	}
 	else {
-		mask.hi = 0x0F & (~((sizek >> 22) -1));
+		mask.hi = ADDRESS_MASK_HIGH & (~((sizek >> 22) -1));
 		mask.lo = 0;
 	}
 



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